SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 627

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SAM3S4B

Manufacturer Part Number
SAM3S4B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S4B

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
48
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Figure 31-17. TWI Write Operation with Multiple Data Bytes with or without Internal Address
6500C–ATARM–8-Feb-11
TWI_THR = data to send
Yes
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Internal address size = 0?
Write ==> bit MREAD = 0
TWI_THR = Data to send
Write STOP Command
Set the Control register:
- Device slave address
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
TWI_CR = STOP
- Master enable
TXCOMP = 1?
Yes
Data to send?
Yes
Set TWI clock
TXRDY = 1?
Yes
BEGIN
END
(if IADR used)
No
No
No
Set the internal address
TWI_IADR = address
SAM3S
627

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