SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 812

• Manufacturer Part Number: SAM3S4B
• Manufacturer: Atmel Corporation

Specifications of SAM3S4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 48
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

35.12 HSMCI Transfer Done Timings
35.12.1
35.12.2
35.12.3
812
SAM3S
Definition
Read Access
Write Access
The XFRDONE flag in the HSMCI_SR indicates exactly when the read or write sequence is
finished.
During a read access, the XFRDONE flag behaves as shown in
Figure 35-11. XFRDONE During a Read Access
During a write access, the XFRDONE flag behaves as shown in
Figure 35-12. XFRDONE During a Write Access
CMDRDY flag
XFRDONE flag
Data bus - D0
Not busy flag
CMD line
D0
XFRDONE flag
CMDRDY flag
Not busy flag
CMD line
Data
HSMCI write CMD
HSMCI read CMD
Card response
Card response
1st Block
1st Block
1st Block
The CMDRDY flag is released 8 tbit after the end of the card response.
The CMDRDY flag is released 8 tbit after the end of the card response.
Last Block
Last Block
Last Block
Figure
Figure
D0 is tied by the card
35-11.
35-12.
D0 is released
6500C–ATARM–8-Feb-11