SAM7SE32 Atmel Corporation, SAM7SE32 Datasheet - Page 26
SAM7SE32
Manufacturer Part Number
SAM7SE32
Description
Manufacturer
Atmel Corporation
Specifications of SAM7SE32
Flash (kbytes)
32 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Introduction
1.1.3
1.1.4
1-4
Memory interface
EmbeddedICE Logic
The ARM7TDMI processor memory interface has been designed to allow performance
potential to be realized, while minimizing the use of memory. Speed-critical control
signals are pipelined to allow system control functions to be implemented in standard
low-power logic. These control signals facilitate the exploitation of the fast-burst access
modes supported by many on-chip and off-chip memory technologies.
The ARM7TDMI core has four basic types of memory cycle:
•
•
•
•
EmbeddedICE Logic is the additional hardware provided by debuggable ARM
processors to aid debugging. It allows software tools to debug code running on a target
processor. The EmbeddedICE Logic is controlled through the Joint Test Action Group
(JTAG) test access port, using the EmbeddedICE interface. See Chapter 5 Debug
Interface and Appendix B Debug in Depth for more information.
idle cycle
nonsequential cycle
sequential cycle
coprocessor register transfer cycle.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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