SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 151

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
17. Watchdog Timer (WDT)
17.1
17.2
17.3
Figure 17-1. Watchdog Timer Block Diagram
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Description
Embedded Features
Block Diagram
WDRSTT
WDT_CR
read WDT_SR
or
reset
write WDT_MR
The Watchdog Timer can be used to prevent system lock-up if the software becomes trapped in
a deadlock. It features a 12-bit down counter that allows a watchdog period of up to 16 seconds
(slow clock at 32.768 kHz). It can generate a general reset or a processor reset only. In addition,
it can be stopped while the processor is in debug mode or idle mode.
• 16-bit Key-protected only-once Programmable Counter
• Provides Reset or Interrupt Signals to the System
• Windowed, prevents the processor to be in a dead lock on the watchdog access
• Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
• AMBA
WDT_MR
– Interfaces to the ARM
WDD
WDERR
<= WDD
-compliant Interface
set
reset
reload
WDT_MR
WDV
12-bit Down
1
WDUNF
Counter
Current
Value
= 0
®
reset
set
Advanced Peripheral Bus
0
1/128
reload
WDRSTEN
WDT_MR
WDT_MR
WDFIEN
SLCK
(to Reset Controller)
wdt_int
wdt_fault
SAM9G35
SAM9G35
151
151

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