SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 316

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
26.2.1
26.2.2
316
SAM9G35
Matrix Masters
Matrix Slaves
The Bus Matrix manages 12 masters, which means that each master can perform an access
concurrently with others, depending on whether the slave it accesses is available.
Each master has its own decoder, which can be defined specifically for each master. In order to
simplify the addressing, all the masters have the same decodings.
Table 26-1.
The Bus Matrix manages 9 slaves. Each slave has its own arbiter, thus allowing a different arbi-
tration per slave to be programmed.
Table 26-2.
Master 0
Master 1
Master 2&3
Master 4&5
Master 6
Master 7
Master 8
Master 9
Master 10
Slave 0
Slave 1
Slave 2
Slave 3
Slave 4
Slave 5
Slave 6
Slave 7
Slave 8
Slave 9
List of Bus Matrix Masters
List of Bus Matrix Slaves
Internal SRAM
Internal ROM
Soft Modem (SMD)
USB Device High Speed Dual Port RAM (DPR)
USB Host EHCI registers
USB Host OHCI registers
External Bus Interface
DDR2 port 1
DDR2 port 2
DDR2 port 3
Peripheral Bridge 0
Peripheral Bridge 1
ARM926 Instruction
ARM926 Data
DMA Controller 0
DMA Controller 1
UDP HS DMA
UHP EHCI DMA
UHP OHCI DMA
EMAC DMA
LCD DMA
11053B–ATARM–22-Sep-11

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