SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 476

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

31.3
Figure 31-1. DMA Controller (DMAC) Block Diagram
476
476
Block Diagram
Datapath Bundles
Datapath Bundles
SAM9G35
SAM9G35
DMA Read
DMA Write
DMA FIFO Controller
Up to 64 bytes
DMA FIFO
DMA Global Control
DMA Global Control
DMA Channel 0
and Data Mux
and Data Mux
DMA Channel 0
Write data path
to destination
DMA Channel 0
Read data path
from source
DMA AHB Lite Master Interface 1
DMA Channel 1
DMA Channel 2
DMA AHB Lite Master Interface 0
DMA Channel n
DMA Destination
Control State Machine
Destination Pointer
Management
DMA Source
Control State Machine
Source Pointer
Management
AMBA AHB Layer 1
AMBA AHB Layer 0
Request Arbiter
DMA Global
DMA Destination
Request Arbiter
DMA Global
DMA Destination
Requests Pool
Requests Pool
DMA Source
Atmel APB rev2 Interface
Trigger Manager
External
Triggers
Soft
Triggers
Status
Registers
Configuration
Registers
DMA Interrupt
Controller
DMA
REQ/ACK
Interface
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
DMA
Atmel
APB
Interface
DMA
Hardware
Handshaking
Interface
DMA Interrupt