SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 512

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

31.7.7
Name:
Address:
Access:
Reset:
• BTCx: Buffer Transfer Completed [7:0]
Buffer transfer completed Disable Interrupt Register. When set, a bit of the BTC field disables the interrupt from the rele-
vant DMAC channel.
• CBTCx: Chained Buffer Transfer Completed [7:0]
Chained Buffer transfer completed Disable Register. When set, a bit of the CBTC field disables the interrupt from the rele-
vant DMAC channel.
• ERRx: Access Error [7:0]
Access Error Interrupt Disable Register. When set, a bit of the ERR field disables the interrupt from the relevant DMAC
channel.
512
512
CBTC7
ERR7
BTC7
31
23
15
–
7
SAM9G35
SAM9G35
DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Disable Register
DMAC_EBCIDR
0xFFFFEC1C (0), 0xFFFFEE1C (1)
0x00000000
Write-only
CBTC6
ERR6
BTC6
30
22
14
–
6
CBTC5
ERR5
BTC5
29
21
13
–
5
CBTC4
ERR4
BTC4
28
20
12
–
4
CBTC3
ERR3
BTC3
27
19
11
–
3
CBTC2
ERR2
BTC2
26
18
10
–
2
CBTC1
ERR1
BTC1
25
17
–
9
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
CBTC0
ERR0
BTC0
24
16
–
8
0