SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 564

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
33.6.13.7
33.6.13.8
33.6.13.9
564
564
SAM9G35
SAM9G35
Entering Suspend State (Bus Activity)
Receiving a Host Resume
Sending an External Resume
When a Suspend (no bus activity on the USB bus) is detected, the DET_SUSPD signal in the
UDPHS_STA register is set. This triggers an interrupt if the corresponding bit is set in the
UDPHS_IEN register. This flag is cleared by writing to the UDPHS_CLRINT register. Then the
device enters Suspend Mode.
In this state bus powered devices must drain less than 500 μA from the 5V VBUS. As an exam-
ple, the microcontroller switches to slow clock, disables the PLL and main oscillator, and goes
into Idle Mode. It may also switch off other devices on the board.
The UDPHS device peripheral clocks can be switched off. Resume event is asynchronously
detected.
In Suspend mode, a resume event on the USB bus line is detected asynchronously, transceiver
and clocks disabled (however the pull-up should not be removed).
Once the resume is detected on the bus, the signal WAKE_UP in the UDPHS_INTSTA is set. It
may generate an interrupt if the corresponding bit in the UDPHS_IEN register is set. This inter-
rupt may be used to wake-up the core, enable PLL and main oscillators and configure clocks.
In Suspend State it is possible to wake-up the host by sending an external resume.
The device waits at least 5 ms after being entered in Suspend State before sending an external
resume.
The device must force a K state from 1 to 15 ms to resume the host.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11

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