SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 60

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

11.4.3
11.4.3.1
60
60
SAM9G35
SAM9G35
Valid Code Detection
ARM Exception Vectors Check
If valid code is found, this code is loaded from NVM into internal SRAM and executed by branch-
ing at address 0x0000_0000 after remap. This code may be the application code or a second-
level bootloader. All the calls to functions are PC relative and do not use absolute addresses.
Figure 11-4. Remap Action after Download Completion
There are two kinds of valid code detection.
The NVM bootloader program reads and analyzes the first 28 bytes corresponding to the first
seven ARM exception vectors. Except for the sixth vector, these bytes must implement the ARM
instructions for either branch or load PC with PC relative addressing.
Figure 11-5. LDR Opcode
Figure 11-6. B Opcode
Unconditional instruction: 0xE for bits 31 to 28
Load PC with PC relative addressing instruction:
31
31
1
1
1
1
– Rn = Rd = PC = 0xF
– I==0 (12-bit immediate value)
– P==1 (pre-indexed)
– U offset added (U==1) or subtracted (U==0)
– W==1
1
1
28 27
28 27
0
0
0x0000_0000
0x0010_0000
0x0030_0000
0
1
1
0
1
I
24 23
24 23
P
0
U
Internal
Internal
Internal
SRAM
ROM
ROM
1
W 0
20 19
REMAP
Rn
16 15
O set (24 bits)
Rd
Internal
Internal
Internal
SRAM
SRAM
ROM
12 11
0x0000_0000
0x0010_0000
0x0030_0000
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
O set
0
0