SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 638

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
34.14 High Speed MultiMediaCard Interface (HSMCI) User Interface
Table 34-8.
Note:
638
638
0x100-0x1FC
0xEC - 0xFC
0x38 - 0x3C
0x58-0xE0
Offset
0x5FC
0x200
0x0C
0x1C
0x2C
0x4C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x40
0x44
0x48
0x50
0x54
0xE4
0xE8
1. The response register can be read by N accesses at the same HSMCI_RSPR or at consecutive addresses (0x20 to 0x2C).
...
SAM9G35
SAM9G35
N depends on the size of the response.
Register Mapping
Register
Control Register
Mode Register
Data Timeout Register
SD/SDIO Card Register
Argument Register
Command Register
Block Register
Completion Signal Timeout Register
Response Register
Response Register
Response Register
Response Register
Receive Data Register
Transmit Data Register
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
DMA Configuration Register
Configuration Register
Reserved
Write Protection Mode Register
Write Protection Status Register
Reserved
Reserved
FIFO Memory Aperture0
FIFO Memory Aperture255
(1)
(1)
(1)
(1)
...
HSMCI_FIFO255
HSMCI_CSTOR
HSMCI_WPMR
HSMCI_CMDR
HSMCI_WPSR
HSMCI_ARGR
HSMCI_DTOR
HSMCI_SDCR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_FIFO0
HSMCI_BLKR
HSMCI_DMA
HSMCI_RDR
HSMCI_TDR
HSMCI_CFG
HSMCI_IMR
HSMCI_IER
HSMCI_IDR
HSMCI_MR
HSMCI_CR
HSMCI_SR
Name
...
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Access
Write
Write
Read
Read
Read
Read
Read
Write
Read
Write
Write
Read
...
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
0xC0E5
Reset
0x00
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
...

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