SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 140

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Tightly-Coupled Memory Interface
5.9
5-32
TCM clock gating
If the ARM926EJ-S processor is not currently running code from a TCM region, the
idle signal for that TCM (DRIDLE for DTCM, IRIDLE for ITCM) is asserted. This
indicates that a TCM access will not be performed in that cycle, enabling you to stop
the TCM clock. If no clock stopping is required, you can ignore the idle signals.
You can also use the idle signal to disable power to the RAMs if you require more
stringent power control. Removing the RAM power invalidates the RAM contents so
you must only do this if the TCMs are not being used and do not contain valid data.
Copyright © 2001-2003 ARM Limited. All rights reserved.
ARM DDI0198D

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