SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 36

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Programmer’s Model
2-8
ID Code Register c0
This is a read-only register that returns the 32-bit device ID code.
You can access the ID Code Register by reading CP15 register c0 with the Opcode_2
field set to any value other than 1 or 2. For example:
The contents of the ID Code Register are shown in Table 2-5.
Cache Type Register c0
This is a read-only register that contains information about the size and architecture of
the Instruction Cache (ICache) and Data Cache (DCache) enabling operating systems
to establish how to perform such operations as cache cleaning and lockdown.
You can access the cache type register by reading CP15 register c0 with the Opcode_2
field set to 1. For example:
The format of the Cache Type Register is shown in Figure 2-2 on page 2-9.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Register bits
[31:24]
[23:20]
[19:16]
[15:4]
[3:0]
a. The revision value can be in the range 0x0 to 0x5, depending on the
layout revision you are using..
Function
ASCII code of implementer trademark
Variant
Architecture (ARMv5TEJ)
Part number
Revision
Table 2-5 Register 0, ID code
ARM DDI0198D
Value
a