SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 77

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

3.2.7
ARM DDI0198D
Translating section references
Table 3-6 shows the fine page table descriptor bit assignments.
Figure 3-8 on page 3-14 shows the complete section translation sequence.
Bits
[31:12]
[11:9]
[8:5]
[4]
[3:2]
[1:0]
Copyright © 2001-2003 ARM Limited. All rights reserved.
Description
These bits form the base for referencing the second-level descriptor (the fine page
table index for the entry is derived from the MVA)
Always written as 0
These bits specify one of the 16 possible domains (held in the domain access
control registers) that contain the primary access controls
Always written as 1
Always written as 0
These bits must be 11 to indicate a fine page table descriptor
Table 3-6 Fine page table descriptor bits
Memory Management Unit
3-13