SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 79

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
ARM DDI0198D
A second-level descriptor defines a tiny, a small, or a large page descriptor, or is invalid:
Coarse page tables provide base addresses for either small or large pages. Large page
descriptors must be repeated in 16 consecutive entries. Small page descriptors must be
repeated in each consecutive entry.
Fine page tables provide base addresses for large, small, or tiny pages. Large page
descriptors must be repeated in 64 consecutive entries. Small page descriptors must be
repeated in four consecutive entries and tiny page descriptors must be repeated in each
consecutive entry.
Second-level descriptor bit assignments are described in Table 3-7.
Bits
Large
[31:16]
[15:12]
31
Copyright © 2001-2003 ARM Limited. All rights reserved.
Large page base address
Small page base address
Tiny page base address
a large page descriptor provides the base address of a 64KB block of memory
a small page descriptor provides the base address of a 4KB block of memory
a tiny page descriptor provides the base address of a 1KB block of memory.
Small
[31:12]
-
Tiny
[31:10]
[9:6]
Should Be Zero.
Description
These bits form the corresponding bits of the physical
address.
16 15
12 11 10 9 8 7 6 5 4 3 2 1 0
Table 3-7 Second-level descriptor bits
AP3 AP2 AP1 AP0 C B 0 1
AP3 AP2 AP1 AP0 C B 1 0
Figure 3-9 Second-level descriptor
AP
Memory Management Unit
C B 1 1
0 0
Fault
Large page
Small page
Tiny page
3-15

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