SAM9XE128 Atmel Corporation, SAM9XE128 Datasheet - Page 95
SAM9XE128
Manufacturer Part Number
SAM9XE128
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE128
Flash (kbytes)
128 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
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- Download datasheet (13Mb)
Table 14-17. Signal Description List (Continued)
14.3.2
6254C–ATARM–22-Jan-10
Signal Name
TST
PGMEN0
PGMEN1
PGMEN2
PGMEN3
TCK
TDI
TDO
TMS
Entering Serial Programming Mode
Function
Test Mode Select
Test Mode Select
Test Mode Select
Test Mode Select
Test Mode Select
JTAG TCK
JTAG Test Data In
JTAG Test Data Out
JTAG Test Mode Select
The following algorithm puts the device in Serial Programming Mode:
Note:
Table 14-18. Reset TAP Controller and Go to Select-DR-Scan
• Apply GND, VDDIO, VDDCORE and VDDPLL.
• Apply XIN clock within T
• Wait for T
• Reset the TAP controller clocking 5 TCK pulses with TMS set.
• Shift 0x2 into the IR register (IR is 4 bits long, LSB first) without going through the Run-Test-
• Shift 0x2 into the DR register (DR is 4 bits long, LSB first) without going through the Run-
• Shift 0xC into the IR register (IR is 4 bits long, LSB first) without going through the Run-Test-
Idle state.
Test-Idle state.
Idle state.
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an
external clock ( > 32 kHz) is connected to XIN, then the device will switch on the external clock.
Else, XIN input is not considered. An higher frequency on XIN speeds up the programmer
handshake.
TDI
POR_RESET
Xt
X
X
X
X
X
X
.
AT91SAM9XE128/256/512 Preliminary
POR_RESET
JTAG
Test
TMS
1
1
1
1
1
0
1
+ 32(T
Output
Type
Input
Input
Input
Input
Input
Input
Input
Input
TAP Controller State
Test-Logic Reset
Run-Test/Idle
Select-DR-Scan
SCLK
) if an external clock is available.
Active
Level
High
High
High
Low
Low
-
-
-
-
Comments
Must be connected to VDDBU.
Must be connected to VDDIO
Must be connected to VDDIO
Must be connected to GND
Must be connected to GND
Pulled-up input at reset
Pulled-up input at reset
Pulled-up input at reset
95
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