AD9628 Analog Devices, AD9628 Datasheet - Page 5

• Manufacturer Part Number: AD9628
• Description: 12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9628

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 125MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Bip,SE-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Parameter
POWER CONSUMPTION
1
2
3
AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless
otherwise noted.
Table 2.
Parameter
SIGNAL-TO-NOISE-RATIO (SNR)
SIGNAL-TO-NOISE AND DISTORTION (SINAD)
EFFECTIVE NUMBER OF BITS (ENOB)
WORST SECOND OR THIRD HARMONIC
Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
Input capacitance refers to the effective capacitance between one differential input pin and AGND.
Standby power is measured with a dc input and with the CLK± pins active (1.8 V CMOS mode).
DC Input
Sine Wave Input (DRVDD = 1.8 V CMOS
Sine Wave Input (DRVDD = 1.8 V LVDS
Standby Power
Power-Down Power
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Output Mode)
Output Mode)
= 9.7 MHz
= 30.5 MHz
= 70 MHz
= 100 MHz
= 200 MHz
= 9.7 MHz
= 30.5 MHz
= 70 MHz
= 100 MHz
= 200 MHz
= 9.7 MHz
= 30.5 MHz
= 70 MHz
= 100 MHz
= 200 MHz
= 9.7 MHz
= 30.5 MHz
= 70 MHz
= 100 MHz
= 200 MHz
1
3
1
1
Temp
25°C
25°C
25°C
Full
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
Temp
Full
Full
Full
Full
Full
Min
70.6
70.5
Min
Rev. 0 | Page 5 of 44
AD9628-105
Typ
129
173
243
108
2.0
AD9628-105
Typ
71.6
71.6
71.3
71.0
69.4
71.5
71.5
71.2
69.9
68.1
11.6
11.6
11.6
11.5
11.0
−92
−90
−90
−89
−83
Max
−82
Max
182
Min
70.2
70
Min
AD9628-125
Typ
148
201
269
120
2.0
AD9628-125
Typ
71.5
71.4
71.2
70.9
69.6
71.4
71.3
71.1
69.8
68.3
11.6
11.6
11.5
11.3
11.1
−92
−90
−93
−90
−84
Max
−85
Max
212
AD9628
Unit
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
Bits
Bits
Bits
Bits
Bits
dBc
dBc
dBc
dBc
dBc
dBc
Unit
mW
mW
mW
mW
mW