AD7298-1 Analog Devices, AD7298-1 Datasheet - Page 7

• Manufacturer Part Number: AD7298-1
• Description: 8-Channel, 1 MSPS, 10-Bit SAR ADC
• Manufacturer: Analog Devices

Specifications of AD7298-1

• Resolution (bits): 10bit
• # Chan: 8
• Sample Rate: 1MSPS
• Interface: SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni (Vref),Uni 1.0V,Uni 1.25,Uni 2.0V,Uni 2.5V
• Adc Architecture: SAR
• Pkg Type: CSP

PIN CONFIGURATION AND FUNCTION DESCRIPTION
Table 5. Pin Function Descriptions
Pin No.
1 to 5,
18 to 20
6
7
8
9
10
11
12
13
14
15
Mnemonic
V
V
V
V
GND1
V
D
GND
V
CS
NC
D
DOUT
SCLK
IN3
IN5
IN7
IN1
REF
DD
CAP
IN
, V
, V
, V
, V
IN4
IN6
IN0
IN2
,
,
Description
Analog Inputs. The AD7298-1 has eight single-ended analog inputs that are multiplexed into the on-chip track-
and-hold. Each input channel can accept analog inputs from 0 V to 2.5 V. Any unused input channels should be
connected to GND1 to avoid noise pickup.
Ground. Ground reference point for the internal reference circuitry on the AD7298-1. The external reference
signals and all analog input signals should be referred to the GND1 voltage. The GND1 pin should be connected
to the ground plane of a system. All ground pins should ideally be at the same potential and must not be more
than 0.3 V apart, even on a transient basis. The V
decoupling capacitor.
Internal Reference/External Reference Supply. The nominal internal reference voltage of 2.5 V appears at this pin.
Provided the output is buffered, the on-chip reference can be taken from this pin and applied externally to the
rest of a system. Decoupling capacitors should be connected to this pin to decouple the reference buffer. For
best performance, it is recommended to use a 10 µF decoupling capacitor on this pin to GND1. The internal
reference can be disabled and an external reference supplied to this pin, if required. The input voltage range for
the external reference is 2.0 V to 2.5 V.
Decoupling Capacitor Pins. Decoupling capacitors (1 µF recommended) are connected to this pin to decouple
the internal LDO.
Ground. Ground reference point for all analog and digital circuitry on the AD7298-1. The GND pin should be
connected to the ground plane of the system. All ground pins should ideally be at the same potential and must
not be more than 0.3 V apart, even on a transient basis. Both the D
GND pin.
Supply Voltage, 2.8 V to 3.6 V. This supply should be decoupled to GND with 10 µF and 100 nF decoupling capacitors.
Chip Select, Active Low Logic Input. This pin is edge triggered on the falling edge of this input, the track-and-
hold goes into hold mode, and a conversion is initiated. This input also frames the serial data transfer. When CS is
low, the output bus is enabled and the conversion result becomes available on the DOUT output.
No Connect.
Data In, Logic Input. Data to be written to the AD7298-1 control register is provided on this input and is clocked
into the register on the falling edge of SCLK.
Serial Data Output. The conversion result from the AD7298-1 is provided on this output as a serial data stream.
The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7298-1 consists of
four address bits indicating which channel the conversion result corresponds to, followed by the 10 bits of
conversion data (MSB first).
Serial Clock, Logic Input. A serial clock input provides the SCLK for accessing the data from the AD7298-1.
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED METAL PADDLE ON THE BOTTOM
AND HEAT DISSIPATION.
OF THE LFCSP PACKAGE SHOULD BE SOLDERED
TO PCB GROUND FOR PROPER FUNCTIONALITY
V
V
V
V
V
IN3
IN4
IN5
IN6
IN7
1
2
3
4
5
Figure 2. Pin Configuration
Rev. A | Page 7 of 24
(Not to Scale)
AD7298-1
TOP VIEW
REF
pin should be decoupled to this ground pin via a 10 µF
12
15
14
13
11
DIN
NC
SCLK
DOUT
CS
CAP
and V
DD
pins should be decoupled to this
AD7298-1