AD7606-4 Analog Devices, AD7606-4 Datasheet
AD7606-4
Specifications of AD7606-4
Related parts for AD7606-4
AD7606-4 Summary of contents
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... One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 Single- True Number of Ended Differential Simultaneous Inputs Inputs Sampling Channels AD7608 AD7609 8 AD7606 8 AD7606-6 6 AD7606-4 4 AD7607 8 REFCAPB REFCAPA REFIN/REFOUT REF SELECT 2.5V REF AGND OUT SERIAL D B OUT ...
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... AD7606/AD7606-6/AD7606-4 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications ..................................................................................... 4 Timing Specifications .................................................................. 7 Absolute Maximum Ratings .......................................................... 11 Thermal Resistance .................................................................... 11 ESD Caution ................................................................................ 11 Pin Configurations and Function Descriptions ......................... 12 Typical Performance Characteristics ........................................... 17 Terminology .................................................................................... 21 Theory of Operation ...................................................................... 22 Converter Details........................................................................ 22 REVISION HISTORY 1/12—Rev Rev. C Changes to Analog Input Ranges Section ................................... 22 10/11— ...
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... The AD7606/AD7606-6/AD7606-4 antialiasing filter has cutoff frequency of 22 kHz and provides 40 dB antialias rejection when sampling at 200 kSPS. The flexible digital filter is pin driven, yields improvements in SNR, and reduces the 3 dB bandwidth ...
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... AD7606/AD7606-6/AD7606-4 SPECIFICATIONS V = 2.5 V external/internal 4. 5. REF CC Table 2. Parameter DYNAMIC PERFORMANCE Signal-to-Noise Ratio (SNR Signal-to-(Noise + Distortion) (SINAD) Dynamic Range Total Harmonic Distortion (THD) 2 Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) 2 Second-Order Terms Third-Order Terms Channel-to-Channel Isolation ...
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... Twos complement All eight channels included; see Table 3 Per channel, all eight channels included Digital inputs = DRIVE AD7606 AD7606-6 AD7606 200 kSPS SAMPLE AD7606 AD7606-6 AD7606-4 Rev Page AD7606/AD7606-6/AD7606-4 Min Typ Max Unit ±10 V ±5 V 5.4 µA 2.5 µ MΩ ...
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... Bipolar zero code error is calculated with respect to the analog input voltage. See the Analog Input Clamp Protection section. 7 Sample tested during initial release to ensure compliance. 8 Operational power/current figure includes contribution when running in oversampling mode. Test Conditions/Comments AD7606 f = 200 kSPS SAMPLE AD7606 AD7606-6 AD7606-4 Rev Page Data Sheet Min Typ Max Unit 80 115.5 mW 100 142 ...
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... D A and D B lines OUT OUT Conversion time µs Oversampling off; AD7606 µs Oversampling off; AD7606-6 µs Oversampling off; AD7606-4 µs Oversampling by 2; AD7606 µs Oversampling by 4; AD7606 µs Oversampling by 8; AD7606 µs Oversampling by 16; AD7606 µs Oversampling by 32; AD7606 µs Oversampling by 64 ...
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... AD7606/AD7606-6/AD7606-4 Limit at T (0.1 × V 0.9 × V Logic Input Levels) Parameter Min SERIAL READ OPERATION f SCLK 0 SCLK t 0 SCLK FRSTDATA OPERATION Limit MIN MAX MIN MAX and (0.3 × ...
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... Sample tested during initial release to ensure compliance. All input signals are specified with oversampling mode, typical t for the AD7606-6 and AD7606-4 can be calculated using ((N × t CONV µs; and for the AD7606- µs. CONV CONV 3 The delay between the CONVST x signals was measured as the maximum time allowed while ensuring a <10 LSB performance matching between channel sets. ...
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... AD7606/AD7606-6/AD7606 DATA: INVALID DB[15: FRSTDATA CS AND RD DATA: DB[15:0] FRSTDATA CS SCLK OUT D B OUT FRSTDATA CS RD DATA: DB[7:0] FRSTDATA Figure 4. Parallel Mode, Separate CS and RD Pulses Figure 5. CS and RD , Linked Parallel Mode ...
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... Package Type −0 0.3 V DRIVE 64-Lead LQFP −0 0 ±10 mA ESD CAUTION −40°C to +85°C −65°C to +150°C 150°C 240 (+0)°C 260 (+0)° Rev Page AD7606/AD7606-6/AD7606-4 θ θ Unit °C/W ...
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... AD7606/AD7606-6/AD7606-4 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS ANALOG INPUT DECOUPLING CAP PIN POWER SUPPLY GROUND PIN DATA OUTPUT DIGITAL OUTPUT DIGITAL INPUT REFERENCE INPUT/OUTPUT ANALOG INPUT DECOUPLING CAP PIN POWER SUPPLY GROUND PIN DATA OUTPUT DIGITAL OUTPUT DIGITAL INPUT REFERENCE INPUT/OUTPUT ...
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... DB0 as the LSB of the data transfers. STBY Standby Mode Input. This pin is used to place the AD7606/AD7606-6/ AD7606-4 into one of two power-down modes: standby mode or shutdown mode. The power-down mode entered depends on the state of the RANGE pin, as shown in Table 7. When in standby mode, all circuitry, except the on- chip reference, regulators, and regulator buffers, is powered down ...
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... V2 for the AD7606-4. CONVST B can be used to initiate simultaneous sampling on the other analog inputs: V5, V6, V7, and V8 for the AD7606; V4, V5, and V6 for the AD7606-6; and V3 and V4 for the AD7606-4. This is possible only when oversampling is not switched on. When the CONVST A or CONVST B pin transitions from low to high, the front-end track-and-hold circuitry for the respective analog inputs is set to hold ...
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... When CS and RD are low, this pin is used to output DB14 of the conversion result. When PAR/SER/BYTE SEL = 1 and DB15/BYTE SEL = 1, the AD7606/ AD7606-6/AD7606-4 operate in parallel byte interface mode. In parallel byte mode, the HBEN pin is used to select whether the most significant byte (MSB) or the least significant byte (LSB) of the conversion result is output first. ...
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... Analog Input 3. For the AD7606-4, this is an AGND pin. AGND Analog Input Ground Pin. For the AD7606-4, this is an AGND pin. AGND Analog Input 4. For the AD7606-6 and the AD7606-4, this is an AGND pin. AGND Analog Input Ground Pin. For the AD7606-6 and AD7606-4, this is an AGND pin. ...
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... CC DRIVE = 200kSPS SAMPLE = 1kHz IN 70k 80k 90k 100k , DRIVE = 11.5kSPS SAMPLE = 25° 133Hz IN 4.0 4.5 5.0 5.5 Rev Page AD7606/AD7606-6/AD7606-4 2 SAMPLE 1 25°C A INTERNAL REFERENCE ±10V RANGE 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 10k 20k 30k 40k CODE Figure 14. AD7606 Typical INL, ±10 V Range 1 ...
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... AD7606/AD7606-6/AD7606-4 1.00 AV INTERNAL REFERENCE 0.75 ±5V RANGE F T 0.50 0.25 0 –0.25 –0.50 –0.75 –1.00 0 8192 16,384 24,576 32,768 40,960 CODE Figure 17. AD7606 Typical DNL, ±5 V Range –5 –10 200kSPS –15 AV EXTERNAL REFERENCE –20 –40 –25 – TEMPERATURE (°C) Figure 18. NFS Error vs. Temperature ...
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... Figure 27. SNR vs. Input Frequency for Different Oversampling Rates, ±10 V Range 105kΩ 48.7kΩ 23.7kΩ 10kΩ 5kΩ 1.2kΩ 100Ω 51Ω 0Ω 100k Rev Page AD7606/AD7606-6/AD7606 DRIVE ...
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... AD7606/AD7606-6/AD7606-4 100 98 ±10V RANGE 96 94 ±5V RANGE DRIVE T = 25°C A INTERNAL REFERENCE 82 F SCALES WITH OS RATIO SAMPLE 80 OFF OS2 OS4 OS8 OS16 OVERSAMPLING RATIO Figure 29. Dynamic Range vs. Oversampling Rate 2.5010 2.5005 AV = 5.25V 2.5000 2.4995 ...
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... N-bit converter with a sine wave input is given by Signal-to-(Noise + Distortion) = (6. 1.76) dB Thus, for a 16-bit converter, the signal-to-(noise + distortion dB. AD7606/AD7606-6/AD7606-4 Total Harmonic Distortion (THD) The ratio of the rms sum of the harmonics to the fundamental. For the AD7606/AD7606-6/AD7606- defined as THD (dB) = ...
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... AD7606-4. Analog Input Impedance The analog input impedance of the AD7606/AD7606-6/ AD7606 MΩ. This is a fixed input impedance that does not vary with the AD7606 sampling frequency. This high analog input impedance eliminates the need for a driver amplifier in front of the AD7606/AD7606-6/AD7606-4, allowing for direct connection to the source or sensor ...
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... The conversion clock for the part is internally generated, and the conversion time for all channels is 4 μs on the AD7606, 3 μs on the AD7606-6, and 2 μs on the AD7606-4. On the AD7606, the BUSY signal returns low after all eight conversions to indicate the end of the conversion process. On the falling edge of BUSY, the track-and-hold amplifiers return to track mode ...
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... Figure 42). The REFIN/ REFOUT pin of the AD7606/AD7606-6/AD7606-4, configured in internal reference mode, should be decoupled using a 10 µF ceramic decoupling capacitor. The other AD7606/AD7606-6/ AD7606-4 devices, configured in external reference mode, should use at least a 100 nF decoupling capacitor on their REFIN/REFOUT pins. REFIN/REFOUT BUF 2 ...
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... POWER-DOWN MODES Two power-down modes are available on the AD7606/AD7606-6/ AD7606-4: standby mode and shutdown mode. The STBY pin controls whether the AD7606/AD7606-6/AD7606-4 are in normal mode or in one of the two power-down modes. ...
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... CONVST A is used to initiate simultaneous sampling of the first set of channels ( for the AD7606 for the AD7606-6, and V1 and V2 for the AD7606-4); and CONVST B is used to initiate simultaneous sampling on the second set of analog input channels ( for the AD7606 for the AD7606-6, and V3 and V4 for the AD7606-4), as illustrated in Figure 44 ...
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... Therefore pulses are required to read all eight conversion results from the AD7606. For the AD7606- pulses are required; and on the AD7606-4, eight RD pulses are required to read all the channel results. To configure the AD7606/AD76706-6/AD7606-4 to operate in parallel byte mode, the PAR /SER/BYTE SEL and BYTE SEL/ DB15 pins should be tied to logic high (see Table 8) ...
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... B. The CS input The subsequent 15 data bits are clocked out of the AD7606/ OUT AD7606-6/AD7606-4 on the SCLK rising edge. Data is valid on the SCLK falling edge. To access each conversion result, 16 clock cycles must be provided to the AD7606/AD7606-6/AD7606-4. The FRSTDATA output signal indicates when the first channel, V1, is being read back ...
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... Data Sheet DIGITAL FILTER The AD7606/AD7606-6/AD7606-4 contain an optional digital first-order sinc filter that should be used in applications where slower throughput rates are used or where higher signal-to-noise ratio or dynamic range is desirable. The oversampling ratio of the digital filter is controlled using the oversampling pins, OS [2:0] (see Table 9) ...
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... AD7606/AD7606-6/AD7606-4 Figure 49 to Figure 55 illustrate the effect of oversampling on the code spread histogram plot. As the oversample rate is increased, the spread of the codes is reduced. 1000 NO OVERSAMPLING 928 887 F = 200kSPS 900 SAMPLE 2.5V DRIVE 800 700 600 500 400 300 200 ...
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... Data Sheet When the oversampling mode is selected for the AD7606/ AD7606-6/AD7606-4, it has the effect of adding a digital filter function after the ADC. The different oversampling rates and the CONVST sampling frequency produce different digital filter frequency profiles. Figure 56 to Figure 61 show the digital filter frequency profiles for the different oversampling rates ...
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... AD7606/AD7606-6/AD7606-4 LAYOUT GUIDELINES The printed circuit board that houses the AD7606/AD7606-6/ AD7606-4 should be designed so that the analog and digital sections are separated and confined to different areas of the board. At least one ground plane should be used. It can be common or split between the digital and analog sections. In the case of the ...
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... Data Sheet To ensure good device-to-device performance matching in a system that contains multiple AD7606/AD7606-6/AD7606-4 devices, a symmetrical layout between the AD7606/AD7606-6/ AD7606-4 devices is important. Figure 64 shows a layout with two AD7606/AD7606-6/AD7606-4 devices. The AV supply plane runs to the right of both devices, CC and the V supply track runs to the left of the two devices ...
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... Z = RoHS Compliant Part. 2 The EVAL-AD7606EDZ, EVAL-AD7606-6EDZ, and EVAL-AD7606-4EDZ can be used as standalone evaluation boards or in conjunction with the CED1Z for evaluation/demonstration purposes. 3 The CED1Z allows the PC to control and communicate with all Analog Devices, Inc., evaluation boards ending in the EDZ designator. ...
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... Data Sheet NOTES AD7606/AD7606-6/AD7606-4 Rev Page ...
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... AD7606/AD7606-6/AD7606-4 NOTES ©2010–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08479-0-1/12(C) Rev Page Data Sheet ...