AD9644 Analog Devices, AD9644 Datasheet - Page 6

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AD9644

Manufacturer Part Number
AD9644
Description
14-Bit, 80 MSPS/155 MSPS, 1.8V Dual, Serial Output A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9644

Resolution (bits)
14bit
# Chan
2
Sample Rate
155MSPS
Analog Input Type
Diff-Bip
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
AD9644
Parameter
TWO-TONE SFDR
CROSSTALK
ANALOG INPUT BANDWIDTH
1
2
3
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, 1.75 V p-p differential input, VIN = −1.0 dBFS differential input, and DCS enabled,
unless otherwise noted.
Table 3.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
SYNC INPUT
DSYNC INPUT
See the
Crosstalk is measured at 100 MHz with −1.0 dBFS on one channel and no input on the alternate channel.
Analog input bandwidth specifies the −3 dB input BW of the AD9644 input. The usable full-scale BW of the part with good performance is 250 MHz.
f
f
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
Logic Compliance
Internal Bias
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
Logic Compliance
Internal Bias
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
IN
IN
= +30 MHz (−7 dBFS ), +33 MHz (−7 dBFS )
= +169 MHz (−7 dBFS ), +172 MHz (−7 dBFS )
AN-835
1
2
Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
3
Temperature
25°C
25°C
Full
25°C
Rev. C | Page 6 of 44
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
Min
0.3
AGND
0.9
−100
−100
8
AGND
1.2
AGND
−100
−100
12
AGND
1.2
AGND
−100
−100
12
AD9644-80
Typ
93
89
−105
780
AD9644-80/AD9644-155
CMOS/LVDS/LVPECL
Max
Typ
0.9
4
10
CMOS
0.9
1
16
CMOS/LVDS
0.9
1
16
Min
AD9644-155
Typ
90
89
−105
780
Max
3.6
AVDD
1.4
+100
+100
12
AVDD
AVDD
0.6
+100
+100
20
AVDD
AVDD
0.6
+100
+100
20
Data Sheet
Max
Unit
V
V p-p
V
V
µA
µA
pF
kΩ
V
V
V
V
µA
µA
pF
kΩ
V
V
V
V
µA
µA
pF
kΩ
Unit
dBc
dBc
dB
MHz

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