AD9644 Analog Devices, AD9644 Datasheet - Page 9

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AD9644

Manufacturer Part Number
AD9644
Description
14-Bit, 80 MSPS/155 MSPS, 1.8V Dual, Serial Output A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9644

Resolution (bits)
14bit
# Chan
2
Sample Rate
155MSPS
Analog Input Type
Diff-Bip
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
Data Sheet
TIMING SPECIFICATIONS
Table 5.
Parameter
SYNC TIMING REQUIREMENTS
SPI TIMING REQUIREMENTS
Timing Diagrams
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
ANALOG
SIGNAL
INPUT
CLK–
CLK+
DOUT+
DOUT–
CLK–
CLK+
N – 23
N – 22
Conditions
SYNC to rising edge of CLK+ setup time
SYNC to rising edge of CLK+ hold time
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
SCLK pulse width high
SCLK pulse width low
Time required for the SDIO pin to switch from an input to an output relative to the SCLK
falling edge
Time required for the SDIO pin to switch from an output to an input relative to the SCLK
rising edge
SYNC
CLK+
N – 21
N – 20
ENCODED INTO 2
8b/10b SYMBOLS
SAMPLE N – 23
t
Figure 3. SYNC Input Timing Requirements
SSYNC
Figure 2. Data Output Timing
N – 1
Rev. C | Page 9 of 44
SAMPLE
N
t
HSYNC
N + 1
ENCODED INTO 2
8b/10b SYMBOLS
SAMPLE N – 22
ENCODED INTO 2
8b/10b SYMBOLS
SAMPLE N – 21
0.30 ns typ
Limit
0.30 ns typ
2 ns min
2 ns min
40 ns min
2 ns min
2 ns min
10 ns min
10 ns min
10 ns min
10 ns min
AD9644

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