AD9963 Analog Devices, AD9963 Datasheet - Page 42

• Manufacturer Part Number: AD9963
• Description: 10-/12-Bit, Low Power, Broadband MxFE
• Manufacturer: Analog Devices

Specifications of AD9963

• Resolution (bits): 12bit
• Throughput Rate: 100MSPS
• # Chan: 2
• Supply V: Multi(+1.8Anlg, +1.8Dig),Multi(+1.8Anlg, +3.3Dig) ,Single(+1.8),Single(+3.3)
• Sample Rate: 100MSPS
• Adc Bits X #adcs-speed: 12x2-100 MHz
• Dac Bits X #dacs-clkspeed: 12x2-170 MHz
• Pkg Type: CSP
• Primary Application: Broadband Wireless

AD9961/AD9963
TRANSMIT DAC OUTPUTS
The optimum noise and distortion performances of the AD9961/
AD9963 are realized when they are configured for differential
operation. The common-mode error sources of the DAC outputs
are significantly reduced by the common-mode rejection of a
transformer or differential amplifier. These common-mode
error sources include even-order distortion products and noise.
The enhancement in distortion performance becomes more
significant as the frequency content of the reconstructed waveform
increases and/or its amplitude increases. This is due to the first-
order cancellation of various dynamic common-mode distortion
mechanisms, digital feedthrough, and noise.
2.06
2.04
2.02
2.00
1.98
1.96
1.94
–2
–4
–6
–8
8
6
4
2
0
Figure 56. Typical DAC Full-Scale Current vs. GAIN1 Code
Figure 57. Typical DAC Full-Scale Current vs. GAIN2 Code
1
0
9
8
17
16
25
24
GAIN1
GAIN2
33
32
41
40
49
48
57
56
Rev. 0 | Page 42 of 60
Figure 58 shows the most basic DAC output circuitry. A pair of
resistors, R
output currents to a differential voltage output, V
the current outputs of the DAC are very high impedance, the
differential driving point impedance of the DAC outputs, R
is equal to 2 × R
Figure 59 illustrates the output voltage waveforms.
The common-mode signal voltage, V
The peak output voltage, V
With this circuit configuration, the single-ended peak voltage is
the same as the peak differential output voltage.
Setting the TXCML Pin Voltage
The TXCML pin serves to change the DAC bias voltages in the
part, allowing it to operate with higher output signal common-
mode voltages. When the output signal common mode is below
0.8 V, the TXCML pin should be tied directly to AGND. When
the output signal common mode is greater then 0.8 V, then the
TXCML pin should be set to 0.5 V. The TXCML pin should be a
low ac impedance source (capacitive decoupling is
recommended).
When the TXVDD supply is 1.8 V, the output signal common-
mode voltage should be kept close to 0 V and the TXCML pin
should be connected directly to ground. When the TXVDD
supply is 3.3 V, the output signal common mode can be operated as
high as 1.25 V.
V
V
CM
PEAK
–V
V
PEAK
PEAK
V
=
CM
O
0
=
, are used to convert each of the complementary
I
2
Figure 58. Basic Transmit DAC Output Circuit
FS
I
FS
V
O
×
Figure 59. Voltage Output Waveforms
N
×
.
R
R
O
O
TXCML
PEAK
TXIN
TXIP
TXQP
TXQN
V
P
, is calculated as:
R
R
R
R
O
O
O
O
CM
, is calculated as:
V
OUT
V
V
V
V
IP
IN
QP
QN
V
OUTI
V
OUTX
OUTQ
+
+
–
–
. Because
OUT
,