AD9261 Analog Devices, AD9261 Datasheet - Page 8

• Manufacturer Part Number: AD9261
• Description: 16-Bit, 10 MHz Bandwidth, 30 MSPS to 160 MSPS Continuous Time Sigma-Delta ADC
• Manufacturer: Analog Devices

Specifications of AD9261

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 160MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD9261
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
1
2
3
4, 19, 31
5, 18, 30
6, 17, 29
7
8
9 to 16, 20 to 27
28
32, 33, 34
35
36
37
38, 46
39, 42, 45
40
41
43
44
47
48
49
Mnemonic
CLK−
CVDD
PDWN
DVDD
DGND
DRVDD
PLL_LOCKED
DCO
OR
PLLMULT4, PLLMULT3, PLLMULT2
PLLMULT1/SDIO
PLLMULT0/SCLK
CSB
AGND
AVDD
VREF
CFILT
VIN+
VIN–
CGND
CLK+
EPAD
D0 to D15
PLL_LOCKED
NOTES
1. THE EXPOSED PAD MUST BE SOLDERED TO THE GROUND PLANE FOR
THE LFCSP PACKAGE. SOLDERING THE EXPOSED PADDLE TO THE PCB
INCREASES THE RELIABILITY OF THE SOLDER JOINTS, MAXIMIZING
THE THERMAL CAPACITY OF THE PACKAGE.
DRVDD
PDWN
DGND
CVDD
DVDD
CLK–
DCO
D0
D1
D2
D3
10
12
11
1
2
3
4
5
6
7
8
9
Description
Clock Input (−).
Clock Supply (1.8 V).
External Power-Down Pin.
Digital Supply (1.8 V).
Digital Ground.
Digital Output Driver Supply (1.8 V to 3.3 V).
PLL Lock Indicator.
Data Clock Output.
Data Output Bits. D0 is the LSB and D15 is the MSB.
Overrange Indicator.
PLL Mode Selection Pins.
PLL Mode Selection Pin/Serial Port Interface Data Input/Output.
PLL Mode Selection Pin/Serial Port Interface Clock.
Serial Port Interface Chip Select. Active low.
Analog Ground.
Analog Supply (1.8 V).
Voltage Reference Input/Output.
Noise Limiting Filter Capacitor.
Analog Input (+).
Analog Input (−).
Clock Ground.
Clock Input (+).
Analog Ground. Pin 49 is the exposed thermal pad on the bottom of the package.
PIN 1
INDICATOR
Figure 3. Pin Configuration
Rev. 0 | Page 8 of 28
(Not to Scale)
AD9261
TOP VIEW
36
35
34
33
32
31
30
29
28
27
26
25
PLLMULT0/SCLK
PLLMULT1/SDIO
PLLMULT2
PLLMULT3
PLLMULT4
DVDD
DGND
DRVDD
OR
D15
D14
D13