AD7626 Analog Devices, AD7626 Datasheet - Page 17

• Manufacturer Part Number: AD7626
• Description: 16-Bit, 10 MSPS, PulSAR Differential ADC
• Manufacturer: Analog Devices

Specifications of AD7626

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 10MSPS
• Interface: LVDS,Ser
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: CSP

TYPICAL CONNECTION DIAGRAM
(2.5V)
VDD2
VDD2
(2.5V)
ADR280
CONTROL FOR
1
2
3
4
5
6
7
8
SEE THE LAYOUT, DECOUPLING, AND GROUNDING SECTION.
C
USE PULL-UP OR PULL-DOWN RESISTORS TO CONTROL EN0 AND EN1 DURING POWER-UP. EN0 AND EN1 INPUTS CAN BE
FIXED IN HARDWARE OR CONTROLLED USING A DIGITAL HOST (EN0 = 0 AND EN1 = 0 PUTS THE ADC IN POWER-DOWN).
OPTION TO USE A CMOS (CNV+) OR LVDS (CNV±) INPUT TO CONTROL CONVERSIONS.
TO ENABLE SELF-CLOCKED MODE, TIE DCO+ TO GND.
CONNECT PIN 19 AND PIN 20 TO VDD1 SUPPLY; ISOLATE THE TRACE TO PIN 19 AND PIN 20 FROM THE TRACE TO PIN 1 USING A
FERRITE BEAD SIMILAR TO WURTH 74279266.
SEE THE DRIVING THE AD7626 SECTION FOR DETAILS ON AMPLIFIER CONFIGURATIONS.
SEE THE VOLTAGE REFERENCE OPTIONS SECTION FOR DETAILS.
100nF
ENABLE
VIO
REF
8
PINS
IS USUALLY A 10µF CERAMIC CAPACITOR WITH LOW ESR AND ESL.
10
VDD1
µ
100nF
(5V)
F
TERMINATION RESISTOR
10nF
LVDS CNV+ AND CNV–
CMOS (CNV+ ONLY)
CONVERSION
10kΩ
100nF
USING 100Ω
CONTROL
V+
3
OR
CAPACITOR ON OUTPUT
10kΩ
FOR STABILITY
4
ADR434
ADR444
1
2
3
4
5
6
7
8
VDD1
VDD2
CAP1
REFIN
EN0
EN1
VDD2
8
100Ω
9
Figure 31. Typical Application Diagram
32
10
LVDS TRANSMIT AND RECEIVE
100Ω
DIGITAL INTERFACE SIGNALS
31
Rev. A | Page 17 of
C
10µF
11
REF
30
DIGITAL HOST
1, 2
(2.5V)
VIO
AD7626
12
29
PADDLE
13
28
14
27
100Ω
10µF
26
15
1
25
5
16
100Ω
VDD1
VDD1
VDD2
GND
VCM
IN+
IN–
17
24
23
22
21
20
19
18
100nF
100nF
IN+
IN–
VCM
FERRITE
BEAD
SEE THE DRIVING
THE AD7625 SECTION
VDD2
(2.5V)
6
VDD1
(5V)
AD7626
7