AD7985 Analog Devices, AD7985 Datasheet - Page 16

• Manufacturer Part Number: AD7985
• Description: 16-Bit, 2.5 MSPS PulSAR 11 mW ADC in QFN
• Manufacturer: Analog Devices

Specifications of AD7985

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 2.5MSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: CSP

AD7985
VOLTAGE REFERENCE INPUT
The AD7985 allows the choice of a very low temperature drift
internal voltage reference, an external reference, or an external
buffered reference.
The internal reference of the AD7985 provides excellent
performance and can be used in almost all applications.
Internal Reference, REF = 4.096 V (PDREF Low)
To use the internal reference, the PDREF input must be low.
This enables the on-chip band gap reference and buffer, result-
ing in a 4.096 V reference on the REF pin (1.2 V on REFIN).
The internal reference is temperature compensated to
4.096 V ± 15 mV. The reference is trimmed to provide
a typical drift of 10 ppm/°C.
The output resistance of REFIN is 6 kΩ when the internal
reference is enabled. It is necessary to decouple this pin with a
ceramic capacitor of at least 100 nF. The output resistance of
REFIN and the decoupling capacitor form an RC filter, which
helps to reduce noise.
Because the output impedance of REFIN is typically 6 kΩ,
relative humidity (among other industrial contaminants) can
directly affect the drift characteristics of the reference. A guard
ring is typically used to reduce the effects of drift under such
circumstances. However, the fine pitch of the AD7985 makes
this difficult to implement. One solution, in these industrial
and other types of applications, is to use a conformal coating,
such as Dow Corning® 1-2577 or HumiSeal® 1B73.
External 1.2 V Reference and Internal Buffer (PDREF High)
To use an external reference along with the internal buffer, PDREF
must be high. This powers down the internal reference and allows
the 1.2 V reference to be applied to REFIN, producing 4.096 V
(typically) on the REF pin.
External Reference (PDREF High, REFIN Low)
To apply an external reference voltage directly to the REF pin,
PDREF should be tied high and REFIN should be tied low.
BVDD should also be driven to the same potential as REF. For
example, if REF = 2.5 V, BVDD should be tied to 2.5 V.
The advantages of directly using an external voltage reference
are as follows:
•
•
SNR and dynamic range improvement (about 1.7 dB)
resulting from the use of a larger reference voltage (5 V)
instead of a typical 4.096 V reference when the internal
reference is used. This is calculated by
Power savings when the internal reference is powered
down (PDREF high).
SNR
=
20
log



. 4
5
096
0 .



Rev. A | Page 16 of 28
Reference Decoupling
The AD7985 voltage reference input, REF, has a dynamic input
impedance that requires careful decoupling between the REF
and REFGND pins. The Layout section describes how this can
be done.
When using an external reference, a very low impedance source
(for example, a reference buffer using the
and a 10 µF (X5R, 0805 size) ceramic chip capacitor are appro-
priate for optimum performance.
If an unbuffered reference voltage is used, the decoupling value
depends on the reference used. For example, a 22 µF (X5R,
1206 size) ceramic chip capacitor is appropriate for optimum
performance using a low temperature drift
If desired, a reference decoupling capacitor with a value as small
as 2.2 µF can be used with minimal impact on performance,
especially DNL.
In any case, there is no need for an additional lower value ceramic
decoupling capacitor (for example, 100 nF) between the REF
and REFGND pins.
POWER SUPPLY
The AD7985 has four power supply pins: an analog supply
(AVDD), a buffer supply (BVDD), a digital supply (DVDD),
and a digital input/output interface supply (VIO). VIO allows
direct interface with any logic from 1.8 V to 2.7 V. To reduce the
number of supplies needed, VIO, DVDD, and AVDD can be tied
together. The power supplies do not need to be started in a par-
ticular sequence. In addition, the AD7985 is very insensitive to
power supply variations over a wide frequency range.
In normal mode, the AD7985 powers down automatically at
the end of each conversion phase and, therefore, the power
scales linearly with the sampling rate. This makes the part ideal
for low sampling rates (even a few SPS) and battery-powered
applications.
Figure 25. Operating Current vs. Sampling Rate in Normal Mode
0.01
0.1
10
1
0.1
SAMPLING RATE (MSPS)
AD8031
ADR43x
1
or the AD8605)
I
I
I
I
I
BVDD
AVDD
DVDD
VIO
VREF
reference.