AD7193 Analog Devices, AD7193 Datasheet - Page 13

• Manufacturer Part Number: AD7193
• Description: 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
• Manufacturer: Analog Devices

Specifications of AD7193

• Resolution (bits): 24bit
• # Chan: 4
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Uni,Usr-Defined Range/Offset
• Ain Range: ± (Vref/Gain)
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

Data Sheet
Table 6. 32-Lead LFCSP Pin Function Descriptions
Pin No.
1
2
3
4
5, 6, 7, 19,
26
8
9
10
11
12
13
14
15
16
17
18
20
Mnemonic
P3
P2
P1/REFIN2(+)
P0/REFIN2(−)
NC
AINCOM
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
REFIN1(+)
REFIN1(−)
BPDSW
Description
Digital Output Pin. This pin can function as a general-purpose output bit referenced between AV
AGND.
Digital Output Pin. This pin can function as a general-purpose output bit referenced between AV
AGND.
Digital Output Pin/Positive Reference Input. This pin functions as a general-purpose output bit referenced
between AV
REFIN2(+). An external reference can be applied between REFIN2(+) and REFIN2(−). REFIN2(+) can lie
anywhere between AV
the part functions with a reference from 1 V to AV
Digital Output Pin/Negative Reference Input. This pin functions as a general-purpose output bit referenced
between AV
REFIN2(−). This reference input can lie anywhere between AGND and AV
No Connect. Tie these pins to AGND.
Analog Input AIN1 to Analog Input AIN8 are referenced to this input when configured for pseudo differential
operation.
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN2 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN1 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN4 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN3 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN6 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN5 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN8 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN7 or as a pseudo differential input when used with AINCOM.
Positive Reference Input. An external reference can be applied between REFIN1(+) and REFIN1(−). REFIN1(+)
can lie anywhere between AV
AV
Negative Reference Input. This reference input can lie anywhere between AGND and AV
Bridge Power-Down Switch to AGND.
DD
, but the part functions with a reference from 1 V to AV
DD
DD
and AGND. When the REFSEL bit in the configuration register = 1, this pin functions as
and AGND. When the REFSEL bit in the configuration register = 1, this pin functions as
P1/REFIN2(+)
P0/REFIN2(–)
NOTES
1. NC = NO CONNECT.
2. CONNECT EXPOSED PAD TO AGND.
AINCOM
Figure 6. 32-Lead LFCSP Pin Configuration
DD
NC
NC
NC
P3
P2
and AGND + 1 V. The nominal reference voltage, (REFIN2(+) − REFIN2(−)), is AV
1
2
3
4
5
6
7
8
DD
Rev. C | Page 13 of 56
and AGND + 1 V. The nominal reference voltage, (REFIN1(+) − REFIN1(−)), is
(Not to Scale)
AD7193
TOP VIEW
DD
24 DV
23 AV
22 DGND
21 AGND
20 BPDSW
19 NC
18 REFIN1(–)
17 REFIN1(+)
.
DD
DD
DD
.
DD
− 1 V.
DD
− 1 V.
DD
DD
AD7193
and
and
DD
, but