AD9280 Analog Devices, AD9280 Datasheet - Page 13

• Manufacturer Part Number: AD9280
• Description: 8-Bit, Complete, 32 MSPS A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9280

• Resolution (bits): 8bit
• # Chan: 1
• Sample Rate: 32MSPS
• Interface: Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: 1 V p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: SOP

The allowable voltage range that can be applied to CLAMPIN
depends on the operational limits of the internal clamp ampli-
fier. The recommended clamp range is between 0.5 volts and
2.0 volts.
The input capacitor should be sized to allow sufficient acquisi-
tion time of the clamp voltage at AIN within the CLAMP inter-
val, but also be sized to minimize droop between clamping
intervals. Specifically, the acquisition time when the switch is
closed will equal:
where V
the error voltage. V
tween the initial input dc level at the start of the clamp interval
and the clamp voltage supplied at CLAMPIN. V
dependent parameter, and equals the maximum tolerable devia-
tion from V
clamped to 1 volt at the AD9280’s input within 10 millivolts,
then V
once the proper clamp level is attained at the input, only a very
small voltage change will be required to correct for droop.
The voltage droop is calculated with the following equation:
where t = time between clamping intervals.
The bias current of the AD9280 will depend on the sampling
rate, F
(REFTS–REFBS)/2 and the input voltage. For a fixed sampling
rate of 32 MHz, Figure 14 shows the input bias current for a
given input. For a 1 V input range, the maximum input bias
current from Figure 14 is 22 A. For lower sampling rates the
input bias current will scale proportionally.
If droop is a critical parameter, then the minimum value of C
should be calculated first based on the droop requirement.
Acquisition time—the width of the CLAMP pulse—can be
adjusted accordingly once the minimum capacitor value is cho-
sen. A tradeoff will often need to be made between droop and
acquisition time, or error voltage V
Clamp Circuit Example
A single supply video amplifier outputs a level-shifted video
signal between 2 and 3 volts with the following parameters:
horizontal period = 63.56 s,
horizontal sync interval = 10.9 s,
horizontal sync pulse = 4.7 s,
sync amplitude = 0.3 volts,
video amplitude of 0.7 volts,
reference black level = 2.3 volts
The video signal must be dc restored from a 2- to 3-volt range
down to a 1- to 2-volt range. Configuring the AD9280 for a
one volt input span with an input range from 1 to 2 volts (see
Figure 24), the CLAMPIN voltage can be set to 1 volt with an
external voltage or by direct connection to REFBS. The CLAMP
pulse may be applied during the SYNC pulse, or during the
REV. E
C
S
, and the difference between the reference midpoint,
C
equals 2 – 1 or 1 volt, and V
is the voltage change required across C
C
. For example, if a 2-volt input level needs to be
T
C
ACQ
is calculated by taking the difference be-
dV
R
IN
I
C
C
BIAS
IN
IN
E
.
E
ln
t
equals 10 mV. Note that
V
V
E
C
E
IN
is a system
, and V
E
is
IN
–13–
back porch to truncate the SYNC below the AD9280’s mini-
mum input voltage. With a C
acquisition time needed to set the input dc level to one volt
with 1 mV accuracy is about 140 s, assuming a full 1 volt V
With a 1 F input coupling capacitor, the droop across one
horizontal can be calculated:
I
than one LSB.
After the input capacitor is initially charged, the clamp pulse
width only needs to be wide enough to correct small voltage
errors such as the droop. The fine scale settling characteristics
of the clamp circuitry are shown in Table II.
Depending on the required accuracy, a CLAMP pulse width of
1 s–3 s should work in most applications. The OFFSET val-
ues ignore the contribution of offset from the clamp amplifier;
they simply compare the output code with a “final value” mea-
sured with a much longer CLAMP pulse duration.
BIAS
= 22 A, and t = 63.5 s, so dV = 1.397 mV, which is less
OR EXTERNAL DC
SHORT TO REFBS
0.1 F
0.1 F
CIN
Figure 24b. Video Clamp Circuit
Figure 24a. Clamp Operation
RIN
CLAMP IN
CLAMP
8 s
4 s
3 s
2 s
1 s
AVDD
CLAMP
10 F
2
AIN
Table II.
IN
0.1 F
= 1 F, and R
OFFSET
<1 LSB
<2 LSBs
2 LSBs
5 LSBs
9 LSBs
SW1
AIN
REFTF
REFTS
REFBF
REFBS
MODE
CLAMP
CLAMPIN
AD9280
AD9280
IN
AD9280
= 20 , the
TO
SHA
C
.