AD5626 Analog Devices, AD5626 Datasheet
AD5626
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AD5626 Summary of contents
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... The AD5626 monolithic DAC offers the user low cost and ease of use only systems. Coding for the AD5626 is natural binary with the MSB loaded first. The output op amp can swing to either rail and is set to a range 4.095 V for a one-millivolt-per-bit resolution capable of sinking and sourcing 5 mA ...
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... Output Section ............................................................................ 10 Power Supply ............................................................................... 10 Timing and Control ................................................................... 11 Applications Information .............................................................. 12 Power Supplies, Bypassing, and Grounding ........................... 12 Unipolar Output Operation ...................................................... 12 Operating the AD5626 Supplies Only ........ 13 Measuring Offset Error ............................................................. 13 Bipolar Output Operation ......................................................... 13 Generating a Negative Supply Voltage .................................... 15 A Single-Supply, Programmable Current Source .................. 15 Galvanically-Isolated Interface ................................................. 15 Microprocessor Interfacing ...
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... load 2 0 load DISS load DD IL PSS ΔV = ±5% DD Rev Page AD5626 Min Typ Max Unit 12 Bits −1 ±1/4 +1 LSB −1 ±3/4 +1 LSB 1/2 3 LSB 4.079 4.095 4.111 V 20 ppm/°C ± ...
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... AD5626 TIMING CHARACTERISTICS @ V = 5.0 V ± 5%, −40°C ≤ T ≤ +85°C, unless otherwise noted Table Parameter LDW CLRW t LD1 t LD2 t CSS t CSH 1 These parameters are guaranteed by design and not subject to production testing. 2 All input control signals are specified with (10 and timed from a voltage level of 1.6 V. ...
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... 0 maximum rating conditions for extended periods may affect 50 mA device reliability. (T max − T )/θ 220°C/W ESD CAUTION 62°C/W 150°C −40°C to +85°C −65°C to +150°C JEDEC industry standard J-STD-020 Rev Page AD5626 ...
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... Returning CS high avoids an additional false clock of serial data input not clock in serial data while LD is low OUT GND CLR LDAC Rev Page OUT AD5626 CS GND 2 7 TOP VIEW SCLK CLR 3 (Not to Scale) 6 SDIN LDAC 4 5 Figure 4. 8-Lead LFCSP Pin Configuration ...
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... Rev Page CH1 5.00V CH2 100mV M2.00ms A CH1 Figure 8. Broadband Noise 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 LOGIC VOLTAGE VALUE (V) Figure 9. Supply Current vs. Logic Input Voltage –10 10 100 1k 10k FREQUENCY (Hz) Figure 10. Power Supply Rejection vs. Frequency AD5626 210µV 4.0 4 100k ...
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... AD5626 5.0 ΔV ≤ 1 LSB FS DATA = 0xFFF T = 25°C A 4.8 4.6 PROPER OPERATION 4.4 WHEN V SUPPLY DD VOLTAGE IS ABOVE CURVE 4.2 4.0 0.01 0.1 OUTPUT LOAD CURRENT (mA) Figure 11. Minimum Supply Voltage vs. Load 2.11 2.10 2.09 2.08 2.07 2.06 2.05 2.04 2.03 0 0.5 1.0 1.5 2.0 TIME (ns) Figure 12. Midscale DAC Glitch Performance SOURCE VERTICLE SCALE OFFSET HORIZONTAL SCALE CH2 1.00V/DIV 2.90V 50.0µs/DIV Figure 13. Large Signal Settling Time ...
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... TO ZERO HOUR TIME POINT –5 100 125 0 Figure 21. Long-Term Drift Accelerated by Burn-In 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 –40 Rev Page AD5626 LOAD DATA = 0xFFF 100 1k 10k FREQUENCY (Hz) Figure 20. Output Voltage Noise vs. Frequency 135 UNITS TESTED AVERAGE 200 400 600 800 1000 HOURS OF OPERATION AT 125° ...
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... One advantage of the rail-to-rail output amplifier used in the AD5626 is the wide range of usable supply voltage. The part is fully specified and tested over temperature for operation from 4. 5. reduced linearity and source current capa- bility near full scale can be tolerated, operation of the AD5626 is possible down to 4 ...
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... V. DD TIMING AND CONTROL The AD5626 has a separate serial input register from the 12-bit DAC register that allows preloading of a new data value into the serial register without disturbing the present DAC output voltage. After the new value is fully loaded in the serial input register, it can be asynchronously transferred to the DAC register by strobing the LDAC pin ...
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... Figure 26. Recommended Grounding and Bypassing Scheme for the AD5626 UNIPOLAR OUTPUT OPERATION This is the basic mode of operation for the AD5626. As shown in Figure 27, the AD5626 is designed to drive loads as low as 2 kΩ in parallel with 500 pF. The code table for this operation is provided in Table 6. ...
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... Because the AD5626 consumes no more than 2.5 mA maximum, an integrated voltage reference, such as the ADR02, can be used as the 5 V supply for the AD5626. See Figure 28 for the circuit configuration. Notice that the output voltage of the reference requires no trimming because of the excellent load regulation and tight initial output voltage tolerance of the ADR02 ...
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... A1 1/2 OP295 Figure 30. Bipolar Output Operation +5V 0.1µ ADR03 6 +2.5V 4 +5V 0.1µF – AD5626 OUT GND 7 V RANGE R1 OUT ±2.5V 10kΩ 10kΩ ±5V 10kΩ 20kΩ Figure 31. Bipolar Output Operation Without Trim matching ...
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... Figure 32. Generating a –5 V Supply When Only Available A SINGLE-SUPPLY, PROGRAMMABLE CURRENT SOURCE The circuit in Figure 33 shows how the AD5626 can be used with an OP295 single-supply, rail-to-rail, output op amp to provide a digitally programmable current sink from V that consumes less than 3.8 mA, maximum. The DAC output voltage is applied across R1 by placing the 2N2222 transistor in the feedback loop of the OP295 ...
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... To load data to the input serial register of the AD5626, PC0 is left low after the first eight bits are transferred, and a second byte of data is then transferred serially to the AD5626. During the second byte load, the first 4 MSBs of the first byte are pushed out of the input shift register of the DAC ...
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... Body, Very Very Thin, Dual Lead (CP-8-3) Dimensions shown in millimeters Temperature Range Package Description –40°C to +85°C 8-Lead MSOP –40°C to +85°C 8-Lead MSOP –40°C to +85°C 8-Lead LFCSP_WD Rev Page 0.80 0.60 0.40 0.65 BSC 8 1.74 PAD 1.64 1.49 1 Package Option RM-8 RM-8 CP-8-3 AD5626 Branding DAP DAP DAP ...
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... AD5626 NOTES Rev Page ...
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... NOTES Rev Page AD5626 ...
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... AD5626 NOTES ©2007—2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06757-0-1/09(A) Rev Page ...