AD5360 Analog Devices, AD5360 Datasheet
AD5360
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AD5360 Summary of contents
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... GPIO function System calibration function allowing user-programmable offset and gain Channel grouping and addressing features Data error checking feature AGND DGND TEMP TEMP_OUT FOR AD5360 SENSOR FOR AD5361 CONTROL PEC REGISTER VOUT0 TO 8 A/B SELECT MON_IN0 VOUT15 REGISTER 6 ...
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... AD5360/AD5361 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications ..................................................................................... 4 AC Characteristics ........................................................................ 5 Timing Characteristics ................................................................ 6 Absolute Maximum Ratings ............................................................ 9 ESD Caution .................................................................................. 9 Pin Configuration and Function Descriptions ........................... 10 Typical Performance Characteristics ........................................... 12 Terminology .................................................................................... 14 Functional Description .................................................................. 15 DAC Architecture ....................................................................... 15 Channel Groups .......................................................................... Registers Gain/Offset Adjustment ................................... 16 Offset DACs ...
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... +16.5 V. The output amplifier headroom requirement is 1.4 V. The AD5360/AD5361 have a high speed 4-wire serial interface, which is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds MHz. All the outputs can be updated simultaneously by taking the LDAC input low ...
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... gain (M), offset (C), and DAC offset registers at default value; all specifications T Table 1. Parameter ACCURACY Resolution AD5360 AD5361 Relative Accuracy AD5360 AD5361 Differential Nonlinearity Zero-Scale Error Full-Scale Error Gain Error 2 Zero-Scale Error Full-Scale Error 2 Span Error of Offset DAC 3 ...
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... VREF0, VREF1 = 2 V p-p, 1 kHz 10 nV-s typ 0.2 nV-s typ 0.02 nV-s typ Effect of input bus activity on DAC output under test 250 nV/√Hz typ VREF0 = VREF1 = 0 V Rev Page AD5360/AD5361 = 5 GND − × θ A TOTAL JA = 200 pF ...
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... AD5360/AD5361 TIMING CHARACTERISTICS open circuit; gain (M), offset (C), and DAC offset registers at default values; all specifications T L Table 3. SPI Interface (See Figure 4 and Figure Parameter Limit MIN MAX ...
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... RESET VOUTx BUSY 1 LDAC ACTIVE DURING BUSY. 2 LDAC ACTIVE AFTER BUSY DB0 Figure 4. SPI Write Timing Rev Page AD5360/AD5361 ...
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... LSB FROM PREVIOUS WRITE Figure 5. SPI Read Timing OUTPUT VOLTAGE VMAX ACTUAL TRANSFER FUNCTION IDEAL TRANSFER FUNCTION 0 DAC CODE FOR AD5360 FOR AD5361 ZERO-SCALE ERROR VMIN Figure 6. DAC Transfer Function Rev Page DB0 NOP CONDITION DB15 DB0 FULL-SCALE ERROR ...
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... 0 −0 +5 − − −0 +0 − −40°C to +85°C −65°C to +150°C 130°C 38°C/W 25°C/W 230°C 10 sec to 40 sec Rev Page AD5360/AD5361 ...
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... DAC Outputs. Buffered analog outputs for each of the 16 DAC channels. Each analog output is capable of driving an output load of 10 kΩ to ground. Typical output impedance of these amplifiers is 0.5 Ω. Rev Page RESET 1 PIN 1 INDICATOR 2 BUSY 3 GPIO 4 MON_OUT 5 AD5360/ MON_IN0 6 AD5361 TOP VIEW NC 9 (Not to Scale ...
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... Serial Data Output for SPI Interface. See Figure 4, Figure 5, and the Serial Interface section for more details. Ground for All Analog Circuitry. The AGND pin should be connected to the AGND plane. Exposed Paddle. SS Rev Page AD5360/AD5361 Figure 4 Figure and the Serial ...
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... Rev Page TIME (µs) Figure 12. Digital Crosstalk 0 16384 32768 49152 DAC CODE Figure 13. Typical AD5360 DNL Plot FREQUENCY (Hz) Figure 14. Noise Spectral Density = 25°C = –15V SS = +15V DD = +4.096V REF 4 5 65535 4 5 ...
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... V = 15V 15V 25°C A 0.5 0 –0.5 –1.0 8.00 –1.0 Figure 20. (VOUTx − MON_OUT Voltage) vs. MON_OUT Current Rev Page AD5360/AD5361 25°C A 0.50 0.52 0.54 0.56 I (mA) CC Figure 18. Typical I Distribution CC –25 – TEMPERATURE (°C) Figure 19. TEMP_OUT Voltage vs. Temperature FULL-SCALE ...
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... This is the amount of energy injected into the analog output at the major code transition specified as the area of the glitch in nV- measured by toggling the DAC register data between 0x7FFF and 0x8000 (AD5360) or 0x1FFF and 0x2000 (AD5361). Channel-to-Channel Isolation Channel-to-channel isolation refers to the proportion of input signal from the reference input of one DAC that appears at the output of another DAC operating from another reference ...
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... The AD5360/AD5361 contain 16 DAC channels and 16 output amplifiers in a single package. The architecture of a single DAC channel consists of a 16-bit resistor-string DAC in the case of the AD5360 and a 14-bit DAC in the case of the AD5361, followed by an output buffer amplifier. The resistor-string section is simply a string of resistors, of equal value, from VREF0 or VREF1 to AGND ...
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... Group unipolar positive, unipolar negative, or bipolar (either symmetrical or asymmetrical) about 0 V. The DACs in the AD5360/AD5361 are factory trimmed with the offset DACs set at their default values. This gives the best offset and gain performance for the default output range and span. ...
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... DAC. If the offset and gain features are not used (that is, the M and C registers are left at their default values), the required reference levels can be calculated as follows: If the offset and gain features of the AD5360/AD5361 are used − 2 the required output range is slightly different ...
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... Use a combination of these two approaches. CALIBRATION The user can perform a system calibration on the AD5360 and AD5361 to reduce gain and offset errors to below 1 LSB. This is achieved by calculating new values for the M and C registers and reprogramming them. Reducing Zero-Scale and Full-Scale Error Zero-scale error can be reduced as follows: 1 ...
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... RESET FUNCTION The reset function is initiated by the RESET pin. On the rising edge of RESET , the AD5360/AD5361 state machine initiates a reset sequence to reset the X, M, and C registers to their default values. This sequence typically takes 300 μs, and the user should not write to the part during this time. On power-up recom- mended that the user bring RESET high as soon as possible to properly initialize the registers ...
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... To indicate that the AD5360/AD5361 have entered temperature shutdown mode, Bit 4 of the control register is set to 1. The AD5360/AD5361 remain in temperature shutdown mode, even if the die tempera- ture falls, until Bit 1 in the control register is cleared to 0. ...
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... The serial interface works with both a continuous and a burst (gated) serial clock. Serial data applied to SDI is clocked into the AD5360/AD5361 by clock pulses applied to SCLK. The first falling edge of SYNC starts the write cycle. At least 24 falling clock edges must be applied to SCLK to clock in 24 bits of data, before SYNC is taken high again ...
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... X2A, X2B, and DAC data registers. To read back a register first necessary to tell the AD5360/AD5361 which register read. This is achieved by writing a word whose first two bits are the Special Function Code 00 to the device. The remaining bits then determine if the ...
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... CHANNEL ADDRESSING AND SPECIAL MODES If the mode bits are not 00, then the data word D15 to D0 (AD5360) or D13 to D0 (AD5361) is written to the device. Address Bit A4 to Address Bit A0 determine which channel or channels is/are written to, while the mode bits determine to which register (X1A, X1B the data is written, as shown in Table 10 and Table 11 ...
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... AD5360/AD5361 SPECIAL FUNCTION MODE If the mode bits are 00, then the special function mode is selected, as shown in Table 14. Bits I21 to I16 of the serial data word select the special function, while the remaining bits are Table 14. Special Function Mode I23 I22 I21 I20 I19 ...
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... The printed circuit board on which the AD5360/AD5361 are mounted should be designed so that the analog and digital sections are separated and confined to certain areas of the board. If the AD5360/AD5361 are in a system where multiple devices require an AGND-to-DGND connection, the connection should be made at one point only. ...
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... Figure 25. Interfacing to a Blackfin DSP The Analog Devices ADSP-21065L is a floating-point DSP with two serial ports (SPORTs). Figure 26 shows how one SPORT can be used to control the AD5360 or AD5361. In this example, the transmit frame synchronization (TFS) pin is connected to the receive frame synchronization (RFS) pin. Similarly, the transmit and receive clocks (TCLK and RCLK) are also connected together ...
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... AD5360BCPZ-REEL7 −40°C to +85°C AD5361BSTZ 1 −40°C to +85°C 1 AD5361BSTZ-REEL −40°C to +85°C 1 AD5361BCPZ −40°C to +85°C 1 AD5361BCPZ-REEL7 −40°C to +85°C 1 EVAL-AD5360EBZ 1 EVAL-AD5361EBZ RoHS Compliant Part. 0.75 1.60 0.60 MAX 0. PIN 1 0.20 0.09 7° 3.5° ...
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... AD5360/AD5361 NOTES ©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05761-0-2/08(A) Rev Page ...