AD9779 Analog Devices, AD9779 Datasheet - Page 33
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AD9779
Manufacturer Part Number
AD9779
Description
Dual 16-Bit, 1 GSPS, Digital-to-Analog Converter
Manufacturer
Analog Devices
Datasheet
1.AD9778.pdf
(56 pages)
Specifications of AD9779
Resolution (bits)
16bit
Dac Update Rate
1GSPS
Dac Settling Time
n/a
Max Pos Supply (v)
+3.47V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par
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Figure 65. Interpolation/Modulation Combination of f
–100
–100
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
10
10
10
0
0
0
–4
–4
–4
Figure 66. Interpolation/Modulation Combination of
Figure 67. Interpolation/Modulation Combination of
–3
–3
–3
2 f
3 f
–2
–2
–2
DAC
DAC
/8 Filter in Shifted Mode
/8 Filter in Shifted Mode
f
f
f
OUT
OUT
OUT
–1
–1
–1
(× Input Data Rate)
( × Input Data Rate)
(× Input Data Rate)
0
0
0
1
1
1
2
2
2
DAC
3
3
3
/8 Filter
4
4
4
Rev. A | Page 33 of 56
Shifted mode filter responses allow the pass band to be centered
around ±0.5 f
to the shifted mode response does not modulate the signal.
Instead, the pass band is simply shifted. For example, picture
the response shown in Figure 67 and assume the signal in-band
is a complex signal over the bandwidth 3.2 f
the even mode filter response is then selected, the pass band
becomes centered at 3.5 f
the same place in the spectrum. The shifted mode capability
allows the filter pass band to be placed anywhere in the DAC
Nyquist bandwidth.
The AD9776/AD9778/AD9779 are dual DACs with internal
complex modulators built into the interpolating filter response.
In dual channel mode, the devices expect the real and the
imaginary components of a complex signal at Digital Input
Port 1 and Digital Input Port 2 (I and Q, respectively). The DAC
outputs then represent the real and imaginary components of
the input signal, modulated by the complex carrier f
f
With Register 2, Bit 6 set, the device accepts interleaved data on
Port 1 in the I, Q, I, Q . . . sequence. Note that in interleaved
mode, the channel data rate at the beginning of the I and the Q
data paths are now half the input data rate because of the inter-
leaving. The maximum input data rate is still subject to the
maximum specification of the device. This limits the synthesis
bandwidth available at the input in interleaved mode.
With Register 0x02, Bit 5 (real mode) set, the Q channel and the
internal I and Q digital modulation are turned off. The output
spectrum at the I DAC then represents the signal at Digital
Input Port 1, interpolated by 1×, 2×, 4×, or 8×.
The general recommendation is that if the desired signal is
within ±0.4 × f
of this, the even filter mode should be used. In any situation, the
total bandwidth of the signal should be less than 0.8 × f
DAC
/4, or f
DAC
/8.
DATA
DATA
, ±1.5 f
, the odd filter mode should be used. Outside
DATA
AD9776/AD9778/AD9779
DATA
, ±2.5 f
. However, the signal remains at
DATA
, and ±3.5 f
DATA
to 3.3 f
DATA
DAC
. Switching
DATA
/2,
DATA
. If
.