AD5405 Analog Devices, AD5405 Datasheet - Page 3

• Manufacturer Part Number: AD5405
• Description: Dual 12-Bit, High Bandwidth, Multiplying DAC with 4 Quadrant Resistors and Parallel Interface
• Manufacturer: Analog Devices

Specifications of AD5405

• Resolution (bits): 12bit
• Dac Update Rate: 21.3MSPS
• Dac Settling Time: 80ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

SPECIFICATIONS
V
otherwise noted. DC performance is measured with OP177, and ac performance is measured with AD8038, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
REFERENCE INPUT
DIGITAL INPUTS/OUTPUT
DYNAMIC PERFORMANCE
DD
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
Gain Error Temperature Coefficient
Bipolar Zero-Code Error
Output Leakage Current
Reference Input Range
V
V
R1, R
R2, R3 Resistance
R2-to-R3 Resistance Mismatch
Input Capacitance
Input High Voltage, V
Input Low Voltage, V
Output High Voltage, V
Output Low Voltage, V
Input Leakage Current, I
Input Capacitance
Reference-Multiplying BW
Output Voltage Settling Time
Measured to ±1 mV of FS
Measured to ±4 mV of FS
Measured to ±16 mV of FS
Digital Delay
10% to 90% Settling Time
Digital-to-Analog Glitch Impulse
Multiplying Feedthrough Error
Output Capacitance
REF
REF
= 2.5 V to 5.5 V, V
Mismatch
Code 0
Code 4095
A, V
A-to-V
FB
Resistance
REF
B Input Resistance
REF
B Input Resistance
REF
IL
IH
OL
OH
= 10 V, I
IL
1
OUT
2 = 0 V. Temperature range for Y version: −40°C to +125°C. All specifications T
Min
8
17
17
1.7
1.7
V
V
DD
DD
− 1
− 0.5
Typ
±5
±10
10
1.6
20
20
0.06
3.5
3.5
4
10
80
35
30
20
15
3
12
25
25
Max
12
±1
−1/+2
±25
±25
±1
±15
13
2.5
25
0.18
0.8
0.7
0.4
0.4
1
10
120
70
60
40
30
70
48
17
30
Rev. B | Page 3 of 24
Unit
Bits
LSB
LSB
mV
ppm FSR/°C
mV
nA
nA
V
kΩ
%
kΩ
kΩ
%
pF
pF
V
V
V
V
V
V
V
V
μA
pF
MHz
ns
ns
ns
ns
ns
nV-sec
dB
dB
pF
pF
Guaranteed monotonic
Data = 0x0000, T
Data = 0x0000, T
Typ = 25°C, max = 125°C
Input resistance TC = −50 ppm/°C
Input resistance TC = −50 ppm/°C
Typ = 25°C, max = 125°C
V
V
V
V
V
V
V
V
V
DAC latch alternately loaded with 0s and 1s
Interface time delay
Rise and fall times
1 LSB change around major carry, V
DAC latch loaded with all 0s, V
1 MHz
10 MHz
DAC latches loaded with all 1s
Conditions
Input resistance TC = −50 ppm/°C
R
DAC latches loaded with all 0s
DD
DD
DD
DD
DD
DD
DD
DD
REF
LOAD
= 3.6 V to 5.5 V
= 2.5 V to 3.6 V
= 2.7 V to 5.5 V
= 2.5 V to 2.7 V
= 4.5 V to 5.5 V, I
= 2.5 V to 3.6 V, I
= 4.5 V to 5.5 V, I
= 2.5 V to 3.6 V, I
= ±3.5 V p-p, DAC loaded all 1s
= 100 Ω, C
LOAD
A
A
= 25°C, I
= −40°C to +125°C, I
= 15 pF, V
SOURCE
SOURCE
SINK
SINK
= 200 μA
= 200 μA
= 200 μA
= 200 μA
OUT
1
REF
REF
MIN
= 10 V
= ±3.5 V
to T
REF
OUT
= 0 V
MAX
1
AD5405
, unless