AD5339 Analog Devices, AD5339 Datasheet - Page 15
Manufacturer Part Number
2.5 V to 5.5 V, 250 µA, 2-Wire Interface, Dual Voltage Output,12-Bit DACs
Specifications of AD5339
Dac Update Rate
Dac Settling Time
Max Pos Supply (v)
Dac Input Format
Bonase Electronics (HK) Co., Limited
THEORY OF OPERATION
The AD5337/AD5338/AD5339 are dual resistor string DACs
fabricated on a CMOS process with resolutions of 8, 10, and
12 bits, respectively. Each part contains two output buffer
amplifiers and is written to via a 2-wire serial interface. The
DACs operate from single supplies of 2.5 V to 5.5 V, and the
output buffer amplifiers provide rail-to-rail output swing with
a slew rate of 0.7 V/μs. The two DACs share a single reference
input pin. Each DAC has three programmable power-down
modes that allow the output amplifier to be configured with
either a 1 kΩ load to ground, a 100 kΩ load to ground, or as
a high impedance three-state output.
DIGITAL-TO-ANALOG CONVERTER SECTION
The architecture of one DAC channel consists of a resistor-
string DAC followed by an output buffer amplifier. The voltage
at the REFIN pin provides the reference voltage for the DAC.
Figure 29 shows a block diagram of the DAC architecture.
Because the input coding to the DAC is straight binary, the ideal
output voltage is given by
D is the decimal equivalent of the binary code, which is loaded
to the DAC register
N is the DAC resolution.
The resistor string portion is shown in Figure 30. It is simply a
string of resistors, each of value R. The digital code loaded to
the DAC register determines the node at which the voltage is
tapped off and fed into the output amplifier. The voltage is
tapped off by closing one of the switches that connects the
string to the amplifier. Because the DAC comprises a string
of resistors, it is guaranteed to be monotonic.
0 to 255 for AD5337 (8 bits)
0 to 1023 for AD5338 and AD5338-1 (10 bits)
0 to 4095 for AD5339 (12 bits)
Figure 29. DAC Channel Architecture
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DAC REFERENCE INPUTS
There is a single reference input pin for the two DACs. The
reference input is unbuffered. The user can have a reference
voltage as low as 0.25 V and as high as V
restriction due to headroom and foot room of any reference
It is recommended to use a buffered reference in the external
circuit, for example, REF192. The input impedance is typically
The output buffer amplifier is capable of generating rail-to-rail
voltages on its output, which gives an output range of 0 V to
a load of 2 kΩ to GND or V
can be seen in the plot in Figure 14.
The slew rate is 0.7 V/μs with a half-scale settling time to
±0.5 LSB (at 8 bits) of 6 μs.
The AD5337/AD5338/AD5339 power on in a defined state via a
power-on reset function. The power-on state is normal operation,
with output voltage set to 0 V.
Both input and DAC registers are filled with zeros until a valid
write sequence is made to the device. This is particularly useful
in applications where it is important to know the state of the
DAC outputs while the device is powering on.
when the reference is V
. The source and sink capabilities of the output amplifier
Figure 30. Resistor String
. The amplifier is capable of driving
in parallel with 500 pF to GND
, because there is no