AD5301 Analog Devices, AD5301 Datasheet
AD5301
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AD5301 Summary of contents
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... FEATURES AD5301: buffered voltage output 8-bit DAC AD5311: buffered voltage output 10-bit DAC AD5321: buffered voltage output 12-bit DAC 6-lead SOT-23 and 8-lead MSOP packages Micropower operation: 120 μ 2-wire (I 2 C®-compatible) serial interface Data readback capability 2 5.5 V power supply ...
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... Input Shift Register .................................................................... 14 Write Operation.......................................................................... 15 Read Operation........................................................................... 16 Power-Down Modes .................................................................. 17 Application Notes ........................................................................... 18 Using REF19x as a Power Supply ............................................. 18 Bipolar Operation Using the AD5301/AD5311/AD5321..... 18 Multiple Devices on One Bus ................................................... 18 CMOS Driven SCL and SDA Lines.......................................... 18 Power Supply Decoupling ......................................................... 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 21 Rev Page ...
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... Rev Page AD5301/AD5311/AD5321 unless otherwise noted. MIN MAX Conditions/Comments Guaranteed monotonic by design over all codes. Guaranteed monotonic by design over all codes. Guaranteed monotonic by design over all codes. All zeros loaded to DAC, see Figure 12. ...
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... See the Terminology section specifications tested with the outputs unloaded. 4 Linearity is tested using a reduced code range: AD5301 (Code 7 to 250); AD5311 (Code 28 to 1000); and AD5321 (Code 112 to 4000). 5 Guaranteed by design and characterization, not production tested. 6 Input filtering on both the SCL and SDA inputs suppress noise spikes that are less than 50 ns. ...
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... Capacitive load for each bus line IH MIN . Figure 2. 2-Wire Serial Interface Timing Diagram Rev Page AD5301/AD5311/AD5321 unless otherwise noted. MIN MAX = the SCL signal) in order to bridge the undefined region of SCL’ ...
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... AD5301/AD5311/AD5321 ABSOLUTE MAXIMUM RATINGS 25°C, unless otherwise noted. A Table 4. Parameter V to GND DD SCL, SDA to GND PD, A1 GND V to GND OUT Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature (T max) J SOT-23 Package Power Dissipation θ Thermal Impedance JA MSOP Package Power Dissipation θ ...
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... Serial Data Line. This is used in conjunction with the SCL line to clock data into the 16-bit input shift register during the write cycle and to read back one or two bytes of data (one byte for the AD5301, two bytes for the AD5311/AD5321) during the read cycle bidirectional open-drain data line that should be pulled to the supply with an external pull-up resistor ...
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... Zero-code error is a measure of the output error when zero code (0x00) is loaded to the DAC register. Ideally, the output should The zero-code error of the AD5301/AD5311/ AD5321 is always positive because the output of the DAC cannot go below 0 V, due to a combination of the offset errors in the DAC and output amplifier ...
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... TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 5. AD5301 Typical INL Plot 25° –1 –2 –3 0 200 400 600 CODE Figure 6. AD5311 Typical INL Plot 25° –4 – ...
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... 0.75 0.50 MAX INL MAX DNL 0.25 0 –0.25 MIN DNL –0.50 MIN INL –0.75 –1.00 – TEMPERATURE (°C) Figure 11. AD5301 INL Error and DNL Error vs. Temperature ZERO CODE –2 –4 FULL SCALE –6 –8 –10 –40 – TEMPERATURE (° ...
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... Figure 18. Supply Current vs. Logic Input Voltage for SDA and SCL Voltage Increasing and Decreasing 1 +25°C +105°C 4.7 5.2 Figure 19. Half-Scale Settling (1/4 to 3/4 Scale Code Charge) INCREASING CH1 CH2 4.0 5.0 Rev Page AD5301/AD5311/AD5321 25°C A LOAD = 2kΩ AND 200pF TO GND V OUT CH1 1V, TIME BASE = 5µs/DIV T = 25° ...
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... AD5301/AD5311/AD5321 T = 25° OUT CH1 CH2 CLK CH1 1V, CH2 5V, TIME BASE = 1µs/DIV Figure 21. Exiting Power-Down to Midscale 2.50 2.49 2.48 2.47 1µs/DIV Figure 22. Major-Code Transition 2.440 2.445 2.450 2.455 Rev Page 1ns/DIV Figure 23. Digital Feedthrough ...
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... Figure 14. The slew rate is 0.7 V/μs with a half-scale settling time to ±0.5 LSB (at 8 bits μs with the output unloaded. POWER-ON RESET The AD5301/AD5311/AD5321 are provided with a power-on AMPLIFIER reset function, ensuring that they power defined state. V OUT The DAC register is filled with zeros and remains so until a valid write sequence is made to the device ...
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... SERIAL BUS The AD5301/AD5311/AD5321 are controlled via an I compatible serial bus. The DACs are connected to this bus as slave devices (no clock is generated by the AD5301/AD5311/ AD5321 DACs). The AD5301/AD5311/AD5321 has a 7-bit slave address. In the case of the 6-lead device, the six MSBs are 000110 and the LSB is determined by the state of the A0 pin ...
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... WRITE OPERATION When writing to the AD5301/AD5311/AD5321 DACs, the user must begin with an address byte, after which the DAC acknowledges that it is prepared to receive data by pulling SCL SDA START ADDRESS BYTE COND BY MASTER SCL SDA LEAST SIGNIFICANT CONTROL BYTE *THIS BIT MUST THE 6-LEAD SOT-23 VERSION. ...
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... When reading data back from the AD5301/AD5311/AD5321 DACs, the user must begin with an address byte after which the DAC acknowledges that it is prepared to transmit data by pulling SDA low. There are two different read operations. In the case of the AD5301, the readback is a single byte that consists of SCL SDA 0 ...
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... POWER-DOWN MODES The AD5301/AD5311/AD5321 have very low power consump- tion, dissipating typically 0.36 mW with supply and 0.75 mW with supply. Power consumption can be further reduced when the DAC is not in use by putting it into one of three power-down modes, which are selected by Bit 13 and Bit 12 (PD1 and PD0) of the control word ...
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... V OUT MULTIPLE DEVICES ON ONE BUS Figure 38 shows four AD5301 devices on the same serial bus. Each has a different slave address since the state of their A0 and A1 pins is different. This allows each DAC to be written to or read from independently. The master device output bus line drivers are open-drain, pull-downs in a fully I interface ...
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... AD5301 a ceramic 0.1 μF capacitor provides a sufficient low impedance path to ground at high frequencies. The power supply lines of the AD5301/AD5311/AD5321 should use as large a trace as possible to provide low impedance paths. A ground line routed between the SDA and SCL lines helps reduce crosstalk between them. This is not required on a multilayer board as there is a ground plane layer, but separating the lines helps ...
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... AD5301/AD5311/AD5321 OUTLINE DIMENSIONS INDICATOR 0.15 MAX 2.90 BSC 2.80 BSC 1.60 BSC PIN 1 0.95 BSC 1.90 1.30 BSC 1.15 0.90 1.45 MAX 0.22 0.08 0.50 SEATING 0.30 PLANE COMPLIANT TO JEDEC STANDARDS MO-178-AB Figure 39. 6-Lead Small Outline Transistor Package [SOT-23] (RJ-6) Dimensions shown in millimeters 3.20 3.00 2.80 5. 3.20 4.90 3.00 4.65 2. PIN 1 0.65 BSC 0.95 0.85 1.10 MAX 0.75 8° 0.15 0.38 0.23 0° 0.00 0.22 0.08 SEATING COPLANARITY PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 40 ...
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... ORDERING GUIDE Model AD5301BRM AD5301BRM-REEL AD5301BRM-REEL7 1 AD5301BRMZ 1 AD5301BRMZ-REEL 1 AD5301BRMZ-REEL7 AD5301BRT-500RL7 AD5301BRT-REEL AD5301BRT-REEL7 1 AD5301BRTZ-500RL7 1 AD5301BRTZ-REEL 1 AD5301BRTZ-REEL7 AD5311BRM AD5311BRM-REEL AD5311BRM-REEL7 1 AD5311BRMZ 1 AD5311BRMZ-REEL 1 AD5311BRMZ-REEL7 AD5311BRT-500RL7 AD5311BRT-REEL AD5311BRT-REEL7 AD5311BRTZ-500RL7 1 1 AD5311BRTZ-REEL 1 AD5311BRTZ-REEL7 AD5321BRM AD5321BRM-REEL AD5321BRM-REEL7 1 AD5321BRMZ 1 AD5321BRMZ-REEL 1 AD5321BRMZ-REEL7 AD5321BRT-500RL7 AD5321BRT-REEL AD5321BRT-REEL7 1 AD5321BRTZ-500RL7 AD5321BRTZ-REEL 1 1 AD5321BRTZ-REEL7 RoHS Compliant Part ...
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... AD5301/AD5311/AD5321 NOTES Rev Page ...
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... NOTES AD5301/AD5311/AD5321 Rev Page ...
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... AD5301/AD5311/AD5321 NOTES Purchase of licensed components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I ©1999–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...