AD7845 Analog Devices, AD7845 Datasheet - Page 6

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AD7845

Manufacturer Part Number
AD7845
Description
Complete 12-Bit CMOS Multiplying DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7845

Resolution (bits)
12bit
Dac Update Rate
200kSPS
Dac Settling Time
5µs
Max Pos Supply (v)
+15.75V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Par

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AD7845
Pin
1
2-11
12
13-14
15
16
17
18
19
20
21
22
23
24
CIRCUIT INFORMATION
Digital Section
Figure 11 is a simplified circuit diagram of the AD7845 input
control logic. When CS and WR are both low, the DAC latch is
loaded with the data on the data inputs. All the digital inputs
are TTL, HCMOS and +5 V CMOS compatible, facilitating
easy microprocessor interfacing. All digital inputs incorporate
standard protection circuitry.
D/A Section
Figure 12 shows a simplified circuit diagram for the AD7845
D/A section and output amplifier.
A segmented scheme is used whereby the 2 MSBs of the 12-bit
data word are decoded to drive the three switches A-C. The
remaining 10 bits drive the switches (S0–S9) in a standard R-2R
ladder configuration.
Figure 11. AD7845 Input Control Logic
V
DB11–DB2
DGND
DB1–DB0
WR
CS
V
AGND
V
V
R
R
R
R
Mnemonic
OUT
REF
SS
DD
A
B
C
FB
Data Bit 11 (MSB) to Data Bit 2
Data Bit 1 to Data Bit 0 (LSB)
Description
Voltage Output Terminal
Digital Ground. The metal lid on the ceramic package is connected to this pin
Write Input. Active low
Chip Select Input. Active low
Reference Input Voltage which can be an ac or dc signal
Analog Ground. This is the reference point for external analog circuitry
Negative power supply for the output amplifier (nominal –12 V to +15 V)
Positive power supply (nominal +12 V to +15 V)
Application resistor. R
Application resistor. R
Application resistor. R
Feedback resistor in the DAC. For normal operation this is connected to V
PIN FUNCTION DESCRIPTION (DIP)
A
B
C
= 4 R
= 2 R
= 2 R
–6–
Each of the switches A–C steers 1/4 of the total reference cur-
rent with the remaining 1/4 passing through the R-2R section.
An output amplifier and feedback resistor perform the current-
to-voltage conversion giving
where D is the fractional representation of the digital word. (D
can be set from 0 to 4095/4096.)
The amplifier can maintain 10 V across a 2 k load. It is inter-
nally compensated and settles to 0.01% FSR (1/2 LSB) in less
than 5 s. The input offset voltage is laser trimmed at wafer
level. The amplifier slew rate is typically 11 V/ s, and the unity
gain small signal bandwidth is 600 kHz. There are three extra
on-chip resistors (R
ing terminal. These are useful in a number of applications in-
cluding offset adjustment and gain ranging.
FB
FB
Figure 12. Simplified Circuit Diagram for the AD7845 D/A
Section
FB
V
REF
2R
C
2R
B
2R
A
A
, R
R
SHOWN FOR ALL 1s ON DAC
V
B
OUT
, R
2R
S9
C
R
= – D
) connected to the amplifier invert-
2R
S8
V
R
REF
2R
S0
OUT
2R
I
OUT
AGND
REV. B

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