ADM1169 Analog Devices, ADM1169 Datasheet - Page 30

• Manufacturer Part Number: ADM1169
• Description: Super Sequencer and Monitor with Margining Control and Non-Volatile Fault Recording
• Manufacturer: Analog Devices

Specifications of ADM1169

• # Supplies Monitored: 8
• Volt Monitoring Accuracy: 1%
• # Output Drivers: 8
• Fet Drive/enable Output: Both
• Voltage Readback: 12-bit ADC
• Supply Adj/margining: 12-bit ADC+4 DACs
• Package: 32 ld LQFP,40 ld LFCSP

ADM1169
WRITE OPERATIONS
The SMBus specification defines several protocols for different
types of read and write operations. The following abbreviations
are used in Figure 39 to Figure 47:
•
•
•
•
•
•
The ADM1169 uses the following SMBus write protocols.
Send Byte
In a send byte operation, the master device sends a single
command byte to a slave device, as follows:
1.
2.
3.
4.
5.
6.
In the ADM1169, the send byte protocol is used for the following
two purposes:
•
•
S = Start
P = Stop
R = Read
W = Write
A = Acknowledge
A = No acknowledge
To write a register address to the RAM for a subsequent
single byte read from the same address, or for a block read
or a block write starting at that address, as shown in Figure 39.
To erase a page of EEPROM memory. EEPROM memory
can be written to only if it is unprogrammed. Before writing
to one or more EEPROM memory locations that are already
programmed, the page(s) containing those locations must
first be erased. EEPROM memory is erased by writing a
command byte.
The master sends a command code telling the slave device to
erase the page. The ADM1169 command code for a page
erasure is 0xFE (1111 1110). Note that, for a page erasure
to take place, the page address must be given in the previous
write word transaction (see the Write Byte/Word section).
In addition, Bit 2 in the UPDCFG register (Address 0x90)
must be set to 1. See Figure 40.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an acknowledge (ACK)
on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
The master asserts a stop condition on SDA and the
transaction ends.
Figure 39. Setting a RAM Address for Subsequent Read
S
S
1
1
ADDRESS
ADDRESS
SLAVE
SLAVE
2
2
Figure 40. EEPROM Page Erasure
W
W
A
A
3
3
(0x00 TO 0xDF)
COMMAND
ADDRESS
(0xFE)
BYTE
RAM
4
4
A
A
5
5
6
P
6
P
Rev. 0 | Page 30 of 36
Write Byte/Word
In a write byte/word operation, the master device sends a command
byte and one or two data bytes to the slave device, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master asserts a stop condition on SDA to end the
In the ADM1169, the write byte/word protocol is used for the
following three purposes:
•
•
As soon as the ADM1169 receives the command byte, page
erasure begins. The master device can send a stop command
as soon as it sends the command byte. Page erasure takes
approximately 20 ms. If the ADM1169 is accessed before
erasure is complete, it responds with a no acknowledge
(NACK).
To write a single byte of data to the RAM. In this case, the
command byte is RAM Address 0x00 to RAM Address 0xDF,
and the only data byte is the actual data, as shown in Figure 41.
To set up a 2-byte EEPROM address for a subsequent read,
write, block read, block write, or page erasure. In this case,
the command byte is the high byte of EEPROM Address 0xF8
to EEPROM Address 0xFB. The only data byte is the low byte
of the EEPROM address, as shown in Figure 42.
Because a page consists of 32 bytes, only the three MSBs of
the address low byte are important for page erasure. The
lower five bits of the EEPROM address low byte specify the
addresses within a page and are ignored during an erase
operation.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an ACK on SDA.
The master sends a command code.
The slave asserts an ACK on SDA.
The master sends a data byte.
The slave asserts an ACK on SDA.
The master sends a data byte (or asserts a stop condition).
The slave asserts an ACK on SDA.
transaction.
S
1
ADDRESS
SLAVE
S
1
ADDRESS
2
SLAVE
2
Figure 41. Single Byte Write to the RAM
Figure 42. Setting an EEPROM Address
W A
3
W A
(0xF8 TO 0xFB)
3
HIGH BYTE
ADDRESS
EEPROM
(0x00 TO 0xDF)
ADDRESS
4
RAM
4
A
5
(0x00 TO 0xFF)
5
A
LOW BYTE
ADDRESS
EEPROM
DATA
6
6
A
7
P
8
A
7
P
8