DS2167Q Maxim Integrated Products, DS2167Q Datasheet

IC PROC ADPCM 16/24/32K 28-PLCC

DS2167Q

Manufacturer Part Number
DS2167Q
Description
IC PROC ADPCM 16/24/32K 28-PLCC
Manufacturer
Maxim Integrated Products
Type
ADPCM Processorr
Datasheet

Specifications of DS2167Q

Mounting Type
Surface Mount
Package / Case
28-LCC, 28-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Applications
-

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FEATURES
DESCRIPTION
The DS2167 and DS2168 are dedicated digital signal
processor (DSP) CMOS chips optimized for Adaptive
Differential Pulse Code Modulation (ADPCM) based
compression algorithms. The devices halve the trans-
Speech compression chip compatible with standard
ADPCM algorithms:
Dual independent channel architecture – device may
be programmed to perform full duplex, 2-channel ex-
pansions, or 2-channel compressions
Interconnects directly with µ-law or A-law codec/filter
devices
Serial PCM and control port interfaces minimize “glue
logic” in multiple channel applications
Hardware mode intended for stand-alone use
28-pin surface-mount package available, designated
DS2167Q/DS2168Q
– DS2167 supports “new” T1Y1 recommenda-
– DS2168 supports “old” CCITT G.721 recom-
– On-chip channel counters identify input and out-
– Unique addressing scheme simplifies device
– Bypass and idle features allow dynamic alloca-
– No host processor required
– Ideal for voice mail applications
tions (July 1986) and “new” CCITT G.721 rec-
ommendations
mendations
put timeslots in TDM-based systems
control; 3-wire port shared among 64 devices
tion of channel bandwidth, minimize system
power requirements
PIN ASSIGNMENT
mission bandwidth of “toll quality” voice from 64K to 32K
bits/second and are utilized in PCM-based telephony
networks.
NC
A0
A1
A2
A3
A4
A5
MCLK
RST
TM0
TM1
SPS
VSS
A0
A1
A2
A3
A4
A5
10
11
5
6
7
8
9
12 13 14 15 16 17 18
4 3 2
24-Pin DIP (600 MIL)
ADPCM Processor
1
2
3
4
5
6
7
8
9
10
11
12
28-Pin PLCC
DS2167/DS2168
1
28
27
24
23
22
21
20
19
18
17
16
15
14
13
26
24
23
22
21
20
19
25
VDD
YIN
CLKY
FSY
YOUT
CS
SDI
SCLK
XOUT
FSX
CLKX
XIN
NC
FSY
YOUT
CS
SDI
SCLK
XOUT
DS2167/DS2168
022698 1/15

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DS2167Q Summary of contents

Page 1

... Hardware mode intended for stand-alone use – No host processor required – Ideal for voice mail applications • 28-pin surface-mount package available, designated DS2167Q/DS2168Q DESCRIPTION The DS2167 and DS2168 are dedicated digital signal processor (DSP) CMOS chips optimized for Adaptive Differential Pulse Code Modulation (ADPCM) based compression algorithms ...

Page 2

DS2167/DS2168 PRODUCT OVERVIEW The DS2167 and DS2168 contain three major function- al blocks: a high performance (10 MIPS) DSP “engine,” two independent PCM data interfaces (“X” and “Y”) which connect directly to serial time division multiplexed (TDM) backplanes and a ...

Page 3

PIN DESCRIPTION Table 1 PIN SYMBOL TYPE 1 RST I Reset. A high-low-high transition clears all internal registers and reset both algo- rithms. The device should be reset on system power-up, and/or when changing to/from hardware mode. 2 TM0 I ...

Page 4

DS2167/DS2168 HARDWARE MODE The hardware mode is intended for preliminary system prototyping or for applications which do not require the features of the serial port. Tying SPS to VSS disables the serial port, clears all internal registers and maps IPD, ...

Page 5

CODEC/FILTER HARDWARE MODE INTERCONNECT Figure 2 TRANSMIT FRAME SYNC TRANSMIT DATA CLOCK VCC MCLKX -5.0 V VBB DX GNDA FSX BCLKX TSX DR TRANSMIT VFXI+ ANALOG FSR VFSI- INTERFACE BCLK/ GSX CLKSEL RECEIVE MCLK/PDN ANALOG VFRO INTERFACE RECEIVE DATA CLOCK ...

Page 6

DS2167/DS2168 both X and Y interfaces, the device enters a low-power standby mode. The DS2167 will power-up within 200 ms after the side is reactivated (IPD=0) from standby. The DS2168 requires an external hardware re- set after ...

Page 7

CONTROL REGISTER Figure 4 (MSB) – – IPD ALRST SYMBOL POSITION NAME AND DESCRIPTION – CR.7 Reserved, must be 0 for proper operation. – CR.6 Reserved, must be 0 for proper operation. IPD CR.5 Idle and Power Down ...

Page 8

DS2167/DS2168 OUTPUT TIMESLOT REGISTER Figure 6 (MSB) – – SYMBOL POSITION NAME AND DESCRIPTION – OTR.7 Reserved, must be 0 for proper operation. – OTR.6 Reserved, must be 0 for proper operation. D5 OTR.5 MSB of output timeslot ...

Page 9

SERIAL PORT WRITE All port writes are initiated by driving CS low and termi- nated when CS returns high. Data is sampled on the ris- ing edge of SCLK and must be written to the device LSB first. Writes to ...

Page 10

DS2167/DS2168 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in ...

Page 11

PCM INTERFACE AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL MCLK Period t PM MCLK Pulse Width t , WMH t WML MCLK Rise and Fall Times CLKX, CLKY Period t PXY CLKX, CLKY Pulse Width t , ...

Page 12

DS2167/DS2168 MASTER CLOCK/RESET AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL MCLK Period t PM MCLK Pulse Width t , WMH t WML RST Pulse Width t WRL SERIAL PORT AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL SDI to SCLK Setup t DC SCLK to ...

Page 13

PCM INTERFACE AC TIMING DIAGRAM Figure HOLD RXY CLKX CLKY t HF FSX FSY t SF XIN É É É É É É É É É YIN É É É É É É É É É XOUT ...

Page 14

DS2167/DS2168 DS2167/DS2168 ADPCM PROCESSOR 24-PIN DIP INCHES DIM MIN MAX A IN. 1.245 1.270 MM 31.62 32.25 B IN. 0.530 0.550 MM 13.46 13.97 C IN. 0.140 0.160 MM 3.56 4.06 D IN. 0.600 0.625 MM ...

Page 15

DS2167/DS2168Q ADPCM PROCESSOR 28-PIN PLCC CH1 e1 E2 INCHES DIM. MIN. MAX. A 0.165 0.180 A1 0.090 0.120 A2 0.020 – B 0.026 0.033 B1 0.013 0.021 C 0.009 0.012 D 0.485 0.495 D1 ...

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