TDA8954 NXP Semiconductors, TDA8954 Datasheet - Page 23

• Manufacturer Part Number: TDA8954
• Description: The TDA8954 is a stereo or mono high–efficiency Class D audio power amplifier in asingle IC featuring low power dissipation
• Manufacturer: NXP Semiconductors

NXP Semiconductors
14. Application information
TDA8954_1
Product data sheet
14.3.1 Single-Ended (SE)
14.1 Mono BTL application
14.2 Pin MODE
14.3 Estimating the output power
When using the power amplifier in a mono BTL application, the inputs of the two channels
must be connected in anti-parallel and the phase of one of the inputs must be inverted;
see
two single-ended demodulation filters.
To ensure a pop noise-free start-up, an RC time-constant must be applied to pin MODE.
The bias-current setting of the VI converter input is directly related to the voltage on pin
MODE. In turn the bias-current setting of the VI converters is directly related to the DC
output offset voltage. A slow dV/dt on pin MODE results in a slow dV/dt for the DC output
offset voltage, ensuring a pop noise-free transition between Mute and Operating modes. A
time-constant of 500 ms is sufficient to guarantee pop noise-free start-up; see
Figure 5
Maximum output power:
Maximum output current is internally limited to 12 A:
Where:
Remark: Note that I
the current through the load and the ripple current. The value of the ripple current is
dependent on the coil inductance and the voltage drop across the coil.
P
I
o peak
•
•
•
•
•
•
o 0.5%
(
(
P
R
R
R
t
f
Figure
w(min)
osc
o(0.5 %)
L
DSon(hs)
s(L)
: load impedance
)
: oscillator frequency
)
=
: series impedance of the filter coil
and
=
: minimum pulse width (typical 150 ns; temperature dependent)
0.5 V
-------------------------------------------------------------------------------------------------- -
10. In principle, the loudspeaker can be connected between the outputs of the
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
: output power at the onset of clipping
------------------------------------------------------- -
R
: high-side R
Figure 11
(
L
+
DD
R
DSon hs
R
–
o(peak)
L
Rev. 01 — 24 December 2009
V
R
+
SS
for more information.
L
(
R
)
DSon hs
DSon
×
)
should be less than 12 A
+
(
1 t
R
(
of power stage output DMOS (temperature dependent)
–
s L ( )
)
w min
+
(
×
R
0.5 V
s L ( )
)
×
(
0.5f
DD
2R
L
osc
–
V
)
SS
)
×
(Section
2 × 210 W class-D power amplifier
(
1 t
–
w min
(
8.4.2). I
)
×
0.5
o(peak)
f
TDA8954
osc
© NXP B.V. 2009. All rights reserved.
)
is the sum of
2
Figure
23 of 46
4,
(1)
(2)