LPC1759FBD80 NXP Semiconductors, LPC1759FBD80 Datasheet - Page 54

The LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz

LPC1759FBD80

Manufacturer Part Number
LPC1759FBD80
Description
The LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
Manufacturer
NXP Semiconductors
Datasheet

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Table 14.
T
[1]
LPC1759_58_56_54_52_51
Product data sheet
Symbol
t
su(SPI_MISO)
amb
Fig 19. SSP MISO line set-up time in SPI Master mode
The peripheral clock for SSP is PCLK = CCLK = 20 MHz.
= 25
C; V
Dynamic characteristic: SSP interface
DD(3V3)
11.7 SSP interface
MOSI
MISO
shifting edges
SCK
Parameter
SPI_MISO set-up time
over specified ranges.
All information provided in this document is subject to legal disclaimers.
Conditions
measured in SPI Master mode;
see
Rev. 7 — 29 March 2011
Figure 19
t
su(SPI_MISO)
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
[1]
Min
30
sampling edges
Typ
-
002aad326
© NXP B.V. 2011. All rights reserved.
Max
-
Unit
ns
54 of 74

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