LPC2458 NXP Semiconductors, LPC2458 Datasheet - Page 19

NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace

LPC2458

Manufacturer Part Number
LPC2458
Description
NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer
NXP Semiconductors
Datasheet

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Table 4.
LPC2458
Product data sheet
Symbol
P4[31]/CS1
ALARM
USB_D2
DBGEN
TDO
TDI
TMS
TRST
TCK
RTCK
RSTOUT
RESET
XTAL1
XTAL2
RTCX1
RTCX2
V
V
V
V
n.c.
V
SSIO
SSCORE
SSA
DD(3V3)
DD(DCDC)(3V3)
Pin description
Ball
E7
H5
N2
E5
B1
C3
C2
D4
D2
C4
H2
J1
L2
K4
J2
J3
H4, P4,
L9, L13,
G13,
D13,
C11,
B4
H3, L8,
A10
F3
E2, L4,
K8, L11,
J14, E12,
E10,
C5
H1, L12,
G10
G1, N9,
E9
[10]
[7][12]
[7][12]
[7][11]
[14]
[1]
[1][8]
[1][9]
[7][11]
[13]
[17]
[7]
[1][8]
[1][8]
[1][8]
[1][9]
[1][8]
[15]
[13]
[16]
…continued
Type
I/O
O
O
I/O
I
O
I
I
I
I
I/O
O
I
I
O
I
O
I
I
I
I
I
I
Description
P4[31] — General purpose digital input/output pin.
CS1 — LOW active Chip Select 1 signal.
ALARM — RTC controlled output. This is a 1.8 V pin. It goes HIGH when a RTC
alarm is generated.
USB_D2 — USB port 2 bidirectional D line.
DBGEN — JTAG interface control signal. Also used for boundary scan.
TDO — Test Data Out for JTAG interface.
TDI — Test Data In for JTAG interface.
TMS — Test Mode Select for JTAG interface.
TRST — Test Reset for JTAG interface.
TCK — Test Clock for JTAG interface. This clock must be slower than
CPU clock (CCLK) for the JTAG interface to operate.
RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) to
operate as Trace port after reset.
RSTOUT — This is a 3.3 V pin. LOW on this pin indicates LPC2458 being in
Reset state.
external reset input: A LOW on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to begin at
address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
ground: 0 V reference for the digital IO pins.
ground: 0 V reference for the core.
analog ground: 0 V reference. This should nominally be the same voltage as
V
3.3 V supply voltage: This is the power supply voltage for the I/O ports.
not connected pins: These pins must be left unconnected (floating).
3.3 V DC-to-DC converter supply voltage: This is the power supply for the
on-chip DC-to-DC converter.
All information provided in this document is subject to legal disclaimers.
SSIO
/V
Rev. 4 — 1 September 2011
SSCORE
, but should be isolated to minimize noise and error.
Single-chip 16-bit/32-bit micro
LPC2458
© NXP B.V. 2011. All rights reserved.
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