LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 26
LPC3130_3131
Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC3130_3131.pdf
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NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
6.17 Input/Output configuration module (IOCONFIG)
6.18 10-bit Analog-to-Digital Converter (ADC10B)
The General Purpose Input/Output (GPIO) pins can be controlled through the register
interface provided in the IOCONFIG module. Next to several dedicated GPIO pins, most
digital I/O pins can also be used as GPIO if they are not required for their normal,
dedicated function.
This module has the following features:
This module is a 10-bit successive approximation Analog-to-Digital Converter (ADC) with
an input multiplexer to allow for multiple analog signals on its input. A common use of this
module is to read out multiple keys on one input from a resistor network.
This module has the following features:
Fig 7. Block diagram of the Watchdog timer
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Provides control for the digital pins that can double as GPIO (next to their normal
function). The pinning list in
Each pin controlled by the IOCONFIG can be configured for four operational modes:
– Normal operation (i.e. controlled by a function block).
– Driven LOW.
– Driven HIGH.
– High impedance/input.
The GPIO pins can be observed (read) in any mode.
The register interface provides set and clear access methods for choosing the
operational mode.
Four analog input channels, selected by an analog multiplexer.
Programmable ADC resolution from 2 bit to 10 bit.
The maximum conversion rate is 400 ksample/s for 10 bit resolution and
1500 ksample/s for 2 bit resolution.
Single A/D conversion scan mode and continuous A/D conversion scan mode.
Power-down mode.
APB
Rev. 1 — 9 February 2009
WDT
m0
m1
Table 4
Low-cost, low-power ARM926EJ-S microcontrollers
EVENT ROUTER
indicates which pins can double as GPIO.
CGU
reset
CONTROLLER
LPC3130/3131
INTERRUPT
002aae086
© NXP B.V. 2009. All rights reserved.
FIQ
IRQ
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