LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 27
LPC3130_3131
Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC3130_3131.pdf
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LPC3130_3131_1
Preliminary data sheet
6.19 Event router
The event router extends the interrupt capability of the system by offering a flexible and
versatile way of generating interrupts. Combined with the wake-up functionality of the
CGU, it also offers a way to wake up the system from suspend mode (with all clocks
deactivated).
The event router has four interrupt outputs connected to the interrupt controller and one
wake-up output connected to the CGU as shown in
activated when an event (for instance a rising edge) is detected on one of the input
signals. The input signals of the event router are connected to relevant internal control
signals in the system or to external signals through pins of the LPC3130/3131.
This module has the following features:
Remark: All pins that can be used as GPIO are connected to the event router (see
Figure
in GPIO mode.
Fig 8. Event router block diagram
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Provides programmable routing of input events to multiple outputs for use as
interrupts or wake up signals.
Input events can come from internal signals or from the pins that can be used as
GPIO.
Inputs can be used either directly or latched (edge detected) as an event source.
The active level (polarity) of the input signal for triggering events is programmable.
Direct events will disappear when the input becomes inactive.
Latched events will remain active until they are explicitly cleared.
Each input can be masked globally for all inputs at once.
Each input can be masked for each output individually.
Event detect status can be read for each output separately.
Event detection is fully asynchronous (no active clock required).
Module can be used to generate a system wake-up from suspend mode.
8). Note that they can be used to trigger events when in normal functional mode or
APB
Rev. 1 — 9 February 2009
input signals
internal
EVENT ROUTER
Low-cost, low-power ARM926EJ-S microcontrollers
(GPIO configurable)
external pins
cgu wakeup
interrupt 0
interrupt 1
interrupt 2
interrupt 3
Figure
8. The output signals are
LPC3130/3131
CONTROLLER
INTERRUPT
CGU
002aae087
© NXP B.V. 2009. All rights reserved.
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