LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 60
LPC3130_3131
Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC3130_3131.pdf
(68 pages)
NXP Semiconductors
Table 26:
LPC3130_3131_1
Preliminary data sheet
Symbol
f
t
s
conv
Fig 28. Differential data-to-EOP transition skew and EOP width
T
PERIOD
differential
data lines
Dynamic characteristics: 10-bit ADC
9.10 10-bit ADC
Parameter
sampling frequency
conversion time
n
differential data to
crossover point
SE0/EOP skew
T
PERIOD
+ t
Conditions
10 bit resolution
2 bit resolution
10 bit resolution
2 bit resolution
FDEOP
Rev. 1 — 9 February 2009
Low-cost, low-power ARM926EJ-S microcontrollers
Min
400
-
-
3
crossover point
extended
Typ
-
-
-
-
Max
-
1500
11
-
LPC3130/3131
source EOP width: t
receiver EOP width: t
Unit
ksample/s
ksample/s
clock cycles
clock cycles
© NXP B.V. 2009. All rights reserved.
FEOPT
002aab561
EOPR1
, t
EOPR2
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