XA-H3 NXP Semiconductors, XA-H3 Datasheet - Page 14

• Manufacturer Part Number: XA-H3
• Description: The powerful 16-bit XA CPU core and rich feature set make the XA-H3 and XA-H4 devices ideal for high-performance real-time applications such as industrial control and networking
• Manufacturer: NXP Semiconductors

Philips Semiconductors
1999 Sep 24
UART3 Write Register 0
UART3 Write Register 1
UART3 Write Register 2
UART3 Write Register 3
UART3 Write Register 4
UART3 Write Register 5
UART3 Write Register 8
UART3 Write Register 9
UART3 Write Register 10
UART3 Write Register 11
UART3 Write Register 12
UART3 Write Register 13
UART3 Write Register 14
UART3 Write Register 15
UART3 Read Register 0
UART3 Read Register 1
UART3 Read Register 3
UART3 Read Register 8
UART3 Read Register 10
DMA Control Register Ch.0 Rx
FIFO Control & Status Reg Ch.0 Rx
Segment Register Ch.0 Rx
Buffer Base Register Ch.0 Rx
Buffer Bound Register Ch.0 Rx
Address Pointer Reg Ch.0 Rx
Byte Count Register Ch.0 Rx
Data FIFO Register Ch.0 Lo Rx
Data FIFO Register Ch.0 Hi Rx
DMA Control Register Ch.1 Rx
FIFO Control & Status Register Ch.1 Rx
Segment Register Ch. 1 Rx
CMOS 16-bit highly integrated microcontroller
Reserved – do not write
Reserved – do not write
Reserved – do not write
Reserved – do not write
Reserved – do not write
Reserved – do not write
Reserved – do not write
Reserved – do not write
Reserved – do not write
MMR Name
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
Rx DMA Registers
UART3 Registers
Size
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
14
8F6-8FEh
Address
Offset
8CAh
8CCh
8CEh
8DAh
8DCh
8DEh
8EAh
8ECh
8EEh
8C0h
8C2h
8C4h
8C6h
8C8h
8D0h
8D2h
8D4h
8D6h
8D8h
8E8h
8E0h
8E2h
8E4h
8E6h
8F0h
8F2h
8F4h
10Ah
10Ch
10Eh
100h
101h
102h
104h
106h
108h
110h
112h
111h
Command register
Tx/Rx Interrupt & data transfer mode
Extended Features Control
Receive Parameter and Control
Tx/Rx miscellaneous parameters & mode
Tx. parameter and control
Reserved – do not write
Reserved – do not write
Transmit Data Buffer
Master Interrupt control
Miscellaneous Tx/Rx control register
Clock Mode Control
Lower Byte of Baud rate time constant
Upper Byte of Baud rate time constant
Miscellaneous Control bits
External / Status interrupt control
Reserved – do not write
Reserved – do not write
Tx/Rx buffer and external status
Receive condition status
Interrupt Pending Bits
Reserved – do not write
Reserved – do not write
Receive Buffer
Clock status
Control Register
Control & Status Register
Points to 64 k data segment
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
Current Address pointer A15 – A0
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Control Register
Control & Status Register
Points to 64 k data segment
10Ch = Byte 0 = older,
10Dh = Byte 1 = younger
10Eh = Byte 2 = older,
10Fh = Byte 3 = younger
Description
Preliminary specification
XA-H3
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
00h
xx
f8h
00h
00h
–
00h
00h
00h
00h
0000h
0000h
0000h
00h
00h
00h
00h
00h
00h
00h
Reset
Value