EP4CE15F17C9L Altera Corporation, EP4CE15F17C9L Datasheet - Page 11

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EP4CE15F17C9L

Manufacturer Part Number
EP4CE15F17C9L
Description
IC CYCLONE IV FPGA 15K 256FBGA
Manufacturer
Altera Corporation
Series
CYCLONE® IV Er
Datasheet

Specifications of EP4CE15F17C9L

Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
165
Number Of Gates
-
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-BGA
Lead Free Status
Contains lead
Rohs Status
RoHS non-compliant

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0
Chapter 1: Cyclone IV Device Datasheet
Operating Conditions
Table 1–12. Internal Weak Pull
November 2011 Altera Corporation
R
R
Notes to
(1) All I/O pins have an option to enable weak pull
(2) Pin pull
(3) R
(4) R
_PU
_PD
Symbol
for JTAG TCK.
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 100°C; V
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 100°C; V
_PU
_PD
Table
= (V
= V
-
I
up resistance values may be lower if an external source drives the pin higher than V
/I
CCIO
R_PD
Value of the I/O pin pull-up resistor
before and during configuration, as
well as user mode if you enable the
programmable pull-up resistor option
Value of the I/O pin pull-down resistor
before and during configuration
1–12:
1
– V
I
)/I
R_PU
Internal Weak Pull-Up and Weak Pull-Down Resistor
Table 1–12
devices.
Hot-Socketing
Table 1–13
Table 1–13. Hot
During hot-socketing, the I/O pin capacitance is less than 15 pF and the clock pin
capacitance is less than 20 pF.
I
I
I
I
Note to
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C dv/dt, in which C is the I/O pin
IOPIN(DC)
IOPIN(AC)
XCVRTX(DC)
XCVRRX(DC)
CCIO
CCIO
Parameter
capacitance and dv/dt is the slew rate.
CCIO
CCIO
= V
CCIO
= V
CCIO
Symbol
Table
- Up and Weak Pull - Down Resistor Values for Cyclone IV Devices
CC
CC
= V
= V
= V
= V
, V
, V
CC
CC
lists the weak pull-up and pull-down resistor values for Cyclone IV
lists the hot-socketing specifications for Cyclone IV devices.
CC
CC
I
I
1–13:
= 0 V;
= V
+ 5%, V
+ 5%, V
– 5%, V
– 5%, V
- Socketing Specifications for Cyclone IV Devices —Preliminary
CC
– 5%;
-
up except the configuration, test, and JTAG pins. The weak pull
I
I
I
I
= V
= 50 mV;
= 0 V; in which V
= V
DC current per I/O pin
AC current per I/O pin
DC current per transceiver TX pin
DC current per transceiver RX pin
CC
CC
+ 5% – 50 mV;
– 5%; in which V
V
V
V
V
V
V
V
V
V
V
V
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
= 3.3 V ± 5%
= 3.0 V ± 5%
= 2.5 V ± 5%
= 1.8 V ± 5%
= 1.5 V ± 5%
= 1.2 V ± 5%
= 3.3 V ± 5%
= 3.0 V ± 5%
= 2.5 V ± 5%
= 1.8 V ± 5%
= 1.5 V ± 5%
I
refers to the input voltage at the I/O pin.
Parameter
Conditions
I
refers to the input voltage at the I/O pin.
(2),
(2),
(2),
(2),
(2),
(2),
(4)
(4)
(4)
(4)
(4)
(3)
(3)
(3)
(3)
(3)
(3)
CCIO
.
Min
10
13
19
7
7
8
6
6
6
7
8
-
down feature is only available
(1)
Cyclone IV Device Handbook,
143
Typ
25
28
35
57
82
19
22
25
35
50
—Preliminary
Maximum
8 mA
100 mA
300 A
50 mA
Max
108
163
351
112
41
47
61
30
36
43
71
(1)
Volume 3
Unit
k
k
k
k
k
k
k
k
k
k
k
1–11

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