EP4CE15F17C9L Altera Corporation, EP4CE15F17C9L Datasheet - Page 42

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EP4CE15F17C9L

Manufacturer Part Number
EP4CE15F17C9L
Description
IC CYCLONE IV FPGA 15K 256FBGA
Manufacturer
Altera Corporation
Series
CYCLONE® IV Er
Datasheet

Specifications of EP4CE15F17C9L

Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
165
Number Of Gates
-
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-BGA
Lead Free Status
Contains lead
Rohs Status
RoHS non-compliant

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0
1–42
Table 1–46. Glossary (Part 5 of 5)
Cyclone IV Device Handbook,
Volume 3
Letter
W
V
X
Y
Z
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CM(DC)
DIF(AC)
DIF(DC)
ICM
ID
IH
IH(AC)
IH(DC)
IL
IL (AC)
IL (DC)
IN
OCM
OD
OH
OL
OS
OX (AC)
REF
REF (AC)
REF (DC)
SWING (AC)
SWING (DC)
TT
X (AC)
Term
DC common mode input voltage.
AC differential input voltage: The minimum AC input differential voltage required for switching.
DC differential input voltage: The minimum DC input differential voltage required for switching.
Input common mode voltage: The common mode of the differential signal at the receiver.
Input differential voltage swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
Voltage input high: The minimum positive voltage applied to the input that is accepted by the
device as a logic high.
High-level AC input voltage.
High-level DC input voltage.
Voltage input low: The maximum positive voltage applied to the input that is accepted by the
device as a logic low.
Low-level AC input voltage.
Low-level DC input voltage.
DC input voltage.
Output common mode voltage: The common mode of the differential signal at the transmitter.
Output differential voltage swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter. V
Voltage output high: The maximum positive voltage from an output that the device considers is
accepted as the minimum positive high level.
Voltage output low: The maximum positive voltage from an output that the device considers is
accepted as the maximum positive low level.
Output offset voltage: V
AC differential output cross point voltage: the voltage at which the differential output signals
must cross.
Reference voltage for the SSTL and HSTL I/O standards.
AC input reference voltage for the SSTL and HSTL I/O standards. V
peak-to-peak AC noise on V
DC input reference voltage for the SSTL and HSTL I/O standards.
AC differential input voltage: AC input differential voltage required for switching. For the SSTL
differential I/O standard, refer to Input Waveforms.
DC differential input voltage: DC input differential voltage required for switching. For the SSTL
differential I/O standard, refer to Input Waveforms.
Termination voltage for the SSTL and HSTL I/O standards.
AC differential input cross point voltage: The voltage at which the differential input signals must
cross.
OS
= (V
REF
OH
must not exceed 2% of V
+ V
OL
) / 2.
Definitions
REF(DC)
Chapter 1: Cyclone IV Device Datasheet
.
November 2011 Altera Corporation
REF(AC)
= V
REF(DC)
OD
= V
+ noise. The
OH
– V
Glossary
OL
.

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