EP4CE15F17C9L Altera Corporation, EP4CE15F17C9L Datasheet - Page 5

• Manufacturer Part Number: EP4CE15F17C9L
• Description: IC CYCLONE IV FPGA 15K 256FBGA
• Manufacturer: Altera Corporation
• Series: CYCLONE® IV Er

Specifications of EP4CE15F17C9L

• Number Of Logic Elements/cells: 15408
• Number Of Labs/clbs: 963
• Total Ram Bits: 516096
• Number Of I /o: 165
• Number Of Gates: -
• Voltage - Supply: 0.97 V ~ 1.03 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status: Contains lead
• Rohs Status: RoHS non-compliant

Chapter 1: Cyclone IV Device Datasheet
Operating Conditions
Table 1–3. Recommended Operating Conditions for Cyclone IV E Devices
Table 1–4. Recommended Operating Conditions for Cyclone IV GX Devices (Part 1 of 2)—Preliminary
November 2011 Altera Corporation
I
Notes to
(1) Cyclone IV E 1.0 V core voltage devices only support C8L, C9L, and I8L speed grades. Cyclone IV E 1.2 V core voltage devices only support
(2) V
(3) V
(4) V
(5) The I7 devices support extended operating junction temperature up to 125°C (usual range is –40°C to 100°C). When using I7 devices at the
(6) The POR time for Standard POR ranges between 50 and 200 ms. Each individual power supply must reach the recommended operating range
(7) The POR time for Fast POR ranges between 3 and 9 ms. Each individual power supply must reach the recommended operating range within
V
V
V
V
V
(3), (5),
Diode
CCINT
CCA
CCD_PLL
CCIO
CC_CLKIN
Symbol
Symbol
C6, C7, C8, I7, and A7 speed grades.
and must be powered up and powered down at the same time.
extended junction temperature ranging from –40°C to 125°C, select C8 as the target device when designing in the Quartus
devices meet all C8 timing specifications when I7 devices operate beyond 100°C and up to 125°C.
within 50 ms.
3 ms.
CCIO
CC
CCIO
(1),
(3),
(6)
(3)
must rise monotonically.
Table
(3)
for all I/O banks must be powered up during device operation. All VCCA pins must be powered to 2.5 V (even when PLLs are not used)
powers all input buffers.
(4)
(2)
1–3:
Core voltage, PCIe hard IP block, and
transceiver PCS power supply
PLL analog power supply
PLL digital power supply
I/O banks power supply for 3.3
operation
I/O banks power supply for 3.0
operation
I/O banks power supply for 2.5
operation
I/O banks power supply for 1.8
operation
I/O banks power supply for 1.5
operation
I/O banks power supply for 1.2
operation
Differential clock input pins power
supply for 3.3
Differential clock input pins power
supply for 3.0
Differential clock input pins power
supply for 2.5
Differential clock input pins power
supply for 1.8
Differential clock input pins power
supply for 1.5
Differential clock input pins power
supply for 1.2
Magnitude of DC current across
PCI-clamp diode when enable
Parameter
- V operation
- V operation
- V operation
- V operation
- V operation
- V operation
Parameter
- V
- V
- V
- V
- V
- V
Conditions
Conditions
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1),
(2)
(Part 2 of 2)
Min
2.375
3.135
2.375
1.425
3.135
2.375
1.425
—
1.16
1.16
2.85
1.71
1.14
2.85
1.71
1.14
Min
Typ
—
Typ
1.2
2.5
1.2
3.3
2.5
1.8
1.5
1.2
3.3
2.5
1.8
1.5
1.2
3
3
Cyclone IV Device Handbook,
®
2.625
3.465
2.625
1.575
3.465
2.625
1.575
Max
II software. The I7
1.24
1.24
3.15
1.89
1.26
3.15
1.89
1.26
Max
10
Volume 3
Unit
Unit
mA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1–5