STM32F105V8 STMicroelectronics, STM32F105V8 Datasheet - Page 28

• Manufacturer Part Number: STM32F105V8
• Description: Mainstream Connectivity line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, CAN, USB 2.0 OTG
• Manufacturer: STMicroelectronics

Specifications of STM32F105V8

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Dma: 12-channel DMA controller
• Supported Peripherals: timers, ADCs, DAC, I2Ss, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter
• 10/100 Ethernet Mac With Dedicated Dma And Sram (4 Kbytes): IEEE1588 hardware support, MII/RMII available on all packages

Pinouts and pin description
Table 5.
28/104
K10
H10 -
J10
G7
G8 36 54
G9
K6
H7
K7 30 48
E7 31 49
K8 33 51
H8 35 53
K9
H9
J7 29 47
F7 32 50
J8 34 52
J9
Pins
-
-
-
-
-
-
-
-
-
44
45
46
55
56
57
58
59
60
61
Pin definitions (continued)
Pin name
V
V
PD10
PD11
PD12
PD13
PD14
PE13
PE14
PE15
PB10
PB11
PB12
PB13
PB14
PB15
PD8
PD9
DD_1
SS_1
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
S
S
(after reset)
function
V
V
PD10
PD11
PD12
PD13
PD14
PE13
PE14
PE15
PB10
PB11
PB12
PB13
PB14
PB15
Main
PD8
PD9
DD_1
SS_1
Doc ID 15274 Rev 6
(3)
USART3_CK
SPI2_MISO
I2C2_SDA
I2C2_SCL
SPI2_MOSI
CAN2_RX/ ETH_MII_TXD0/
SPI2_SCK
SPI2_NSS
TIM1_CH1N/CAN2_TX/
ETH_RMII_TX_EN
ETH_MII_TX_EN/
ETH_MII_RX_ER
ETH_RMII_TXD0
USART3_CTS
ETH_RMII_TXD1
ETH_MII_TXD1/
USART3_RTS
I2C2_SMBA
TIM1_CH3N
(8)
(8)
Default
(8)
(8)
(7)
(8)
(8)
/USART3_RX
/USART3_TX
/ TIM1_BKIN
/I2S2_WS
/ TIM1_CH2N /
/ I2S2_CK
/ I2S2_SD
Alternate functions
(8)
(7)
(7)
(7)
/
STM32F105xx, STM32F107xx
/
(8)
(8)
(8)
(7)
(7)
/
(7)
/
/
/
/
/
ETH_RMII_CRS_DV
ETH_MII_RX_DV/
ETH_RMII_RXD0
ETH_RMII_RXD1
ETH_MII_RXD0/
ETH_MII_RXD1/
ETH_MII_RXD2
ETH_MII_RXD3
USART3_CTS/
USART3_RTS/
(4)
USART3_RX/
USART3_CK/
USART3_TX/
TIM4_CH1 /
TIM1_BKIN
TIM1_CH3
TIM1_CH4
TIM2_CH3
TIM2_CH4
TIM4_CH2
TIM4_CH3
Remap