STM32F105V8 STMicroelectronics, STM32F105V8 Datasheet - Page 76

• Manufacturer Part Number: STM32F105V8
• Description: Mainstream Connectivity line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, CAN, USB 2.0 OTG
• Manufacturer: STMicroelectronics

Specifications of STM32F105V8

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Dma: 12-channel DMA controller
• Supported Peripherals: timers, ADCs, DAC, I2Ss, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter
• 10/100 Ethernet Mac With Dedicated Dma And Sram (4 Kbytes): IEEE1588 hardware support, MII/RMII available on all packages

Electrical characteristics
76/104
Figure 34. ADC accuracy characteristics
Figure 35. Typical connection diagram using the ADC
1. Refer to
2. C
4095
4094
4093
pad capacitance (roughly 7 pF). A high C
this, f
7
6
5
4
3
2
1
parasitic
0
V
SSA
[1LSB
ADC
1
Table 52
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
E
should be reduced.
IDEAL
O
V AIN
2
=
V
4096
3
for the values of R
REF+
R AIN (1)
4
(or
C parasitic
V
5
1 LSB
4096
DDA
E
AINx
6
T
depending on package)]
IDEAL
Doc ID 15274 Rev 6
E
AIN
7
L
(2)
, R
parasitic
ADC
E
V DD
D
and C
4093 4094 4095 4096
(3)
0.6 V
0.6 V
value will downgrade conversion accuracy. To remedy
V T
V T
ADC
(1)
.
E
I L ±1 µA
G
V
DDA
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
Sample and hold ADC
converter
R ADC (1)
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Differential Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
STM32F105xx, STM32F107xx
C ADC (1)
converter
12-bit
STM32F10xxx
ai14139d
ai14395b