STM32F103T8 STMicroelectronics, STM32F103T8 Datasheet - Page 31

no-image

STM32F103T8

Manufacturer Part Number
STM32F103T8
Description
Mainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F103T8

Conversion Range
0 to 3.6 V
Peripherals Supported
timers, ADC, SPIs, I2Cs and USARTs

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
STM32F103T8U6
Manufacturer:
ST
Quantity:
13 000
Price:
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
STM32F103T8U6
Manufacturer:
STMicroelectronics
Quantity:
20 000
Price:
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
STM32F103T8U7
Manufacturer:
ST
Quantity:
100
Price:
STM32F103x8, STM32F103xB
Table 5.
1. I = input, O = output, S = supply.
2. FT = 5 V tolerant.
3. Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower
4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should
5. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current
6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even
7. Unlike in the LQFP64 package, there is no PC3 in the TFBGA64 package. The V
8. This alternate function can be remapped by software to some other port pins (if available on the used package). For more
9. The pins number 2 and 3 in the VFQFPN36 package, 5 and 6 in the LQFP48 and LQFP64 packages, and C1 and C2 in the
C5
D5
D4
C4
B5
A5
B4
A4
E5
F5
number of peripheral that is included. For example, if a device has only one SPI and two USARTs, they will be called SPI1
and USART1 & USART2, respectively. Refer to
be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).
(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: the speed should not exceed 2 MHz with a maximum
load of 30 pF and these IOs must not be used as a current source (e.g. to drive an LED).
after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the
Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the
STMicroelectronics website: www.st.com.
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available
from the STMicroelectronics website: www.st.com.
TFBGA64 package are configured as OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be
remapped by software on these pins. For the LQFP100 package, PD0 and PD1 are available by default, so there is no
need for remapping. For more details, refer to the Alternate function I/O and debug configuration section in the
STM32F10xxx reference manual.
The use of PD0 and PD1 in output mode is limited as they can only be used at 50 MHz in output mode.
41
42
43
44
45
46
47
48
-
-
C4
D3
C3
B4
B3
A3
D4
E4
-
-
Pins
Medium-density STM32F103xx pin definitions (continued)
57
58
59
60
61
62
63
64 100 1
-
-
91 32
92 33
93 34
94 35
95
96
97
98
99 36
-
-
-
-
Pin name
BOOT0
V
V
PB5
PB6
PB7
PB8
PB9
PE0
PE1
DD_3
SS_3
Table 2 on page
Doc ID 13587 Rev 13
I/O
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
S
S
I
10.
(after reset)
function
BOOT0
V
V
Main
PB5
PB6
PB7
PB8
PB9
PE0
PE1
DD_3
SS_3
(3)
REF+
functionality is provided instead.
I2C1_SCL
I2C1_SDA
TIM4_CH1
TIM4_CH2
TIM4_CH3
TIM4_CH4
I2C1_SMBAl
TIM4_ETR
Pinouts and pin description
Default
Alternate functions
(8)
(8)
(8)
(8)
(8)
(8)
/
/
USART1_RX
USART1_TX
TIM3_CH2 /
SPI1_MOSI
I2C1_SCL /
I2C1_SDA/
CANRX
CANTX
Remap
(4)
31/99

Related parts for STM32F103T8