STM32F103T8 STMicroelectronics, STM32F103T8 Datasheet - Page 94

• Manufacturer Part Number: STM32F103T8
• Description: Mainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
• Manufacturer: STMicroelectronics

Specifications of STM32F103T8

• Conversion Range: 0 to 3.6 V
• Peripherals Supported: timers, ADC, SPIs, I2Cs and USARTs

Revision history
94/99
Table 60.
22-Nov-2007
Date
Document revision history (continued)
Revision
4
Document status promoted from preliminary data to datasheet.
The STM32F103xx is USB certified. Small text changes.
Power supply schemes on page 15
communication peripherals corrected for STM32F103Tx and number of
GPIOs corrected for LQFP package in
density device features and peripheral
Main function and default alternate function modified for PC14 and
PC15 in,
density STM32F103xx pin
V
characteristics,
Note 1
control block
I
Maximum current consumption in Run mode, code with data
processing running from
I
Maximum current consumption in Sleep mode, code running from
Flash or RAM on page
I
added in
and Standby
on page
Table 19: Peripheral current
t
respectively.
Maximum values removed from
timings. t
and data
Figure 19: Typical current consumption in Stop mode with regulator in
Low-power mode versus temperature at VDD = 3.3 V and 3.6 V
Note removed below
CPHA =
mode and CPHA =
Details on unused pins removed from
characteristics on page
Table 42: SPI characteristics
added. V
Table 46: ADC
in
Inch values corrected in
profile quad flat package mechanical
mm, 64-pin low-profile quad flat package mechanical data
Table 57: LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package
mechanical
Θ
characteristics.
Order codes replaced by
MCU ‘s operating conditions modified in
on page
characteristics.
Impedance size specified in
page
DD
DD
DD_VBAT
SU(HSE)
DD
JA
Table 49: ADC
value for VFQFPN36 package added in
Doc ID 13587 Rev 13
value at 72 MHz with peripherals enabled modified in
value at 72 MHz with peripherals enabled modified in
–V
81.
SS
and
and t
47. ADC1 and ADC2 consumption and notes modified in
0. Note added below
45. Avg_Slope and V
RET
AIN
Table 16: Typical and maximum current consumptions in Stop
Note 6
typical value at 2.4 V modified and I
retention.
ratings and
Note 2
, t
data.
conditions modified in
characteristics.
modes. Note added in
SU(LSE)
lat and
characteristics. Test conditions modified and note added
Note 1
I2C interface characteristics on page 67
added and Remap column added in
accuracy. Note added below
added in
Figure 13: Power supply scheme
1(1).
t
latr
Figure 32: SPI timing diagram - slave mode and
conditions modified in
Note 1
modified in
42.
modified, note added and I
60.
Table 54: LQPF100, 14 x 14 mm 100-pin low-
Section 7: Ordering information
RAM.
definitions.
Table 11: Embedded reset and power
consumption.
A.4: Voltage glitch on ADC input 0 on
modified in
updated.
25
Figure 33: SPI timing diagram - slave
Changes
Table 26: Low-power mode wakeup
modified in
Table 7: Current
Table 29: Flash memory endurance
modified. Number of
Table 17 on page 46
STM32F103x8, STM32F103xB
data,
General input/output
Table 2: STM32F103xx medium-
Table 43: USB startup time
counts.
Typical current consumption
Table 6: Voltage
Table 55: LQFP64, 10 x 10
Table 58: Package thermal
Table 22
Table 50: TS
DD_VBAT
Table 47
lkg
characteristics.
corrected.
Table 5: Medium-
and
removed in
maximum values
and
modified.
and
scheme.
Table 14:
Table 15:
Table
and
Table
Table 18
23,
added.
50.