STM32F103ZC STMicroelectronics, STM32F103ZC Datasheet - Page 21

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STM32F103ZC

Manufacturer Part Number
STM32F103ZC
Description
Mainstream Performance line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F103ZC

Core
ARM 32-bit Cortex™-M3 CPU
Conversion Range
0 to 3.6 V
Dma
12-channel DMA controller
Supported Peripherals
timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter
STM32F103xC, STM32F103xD, STM32F103xE
2.3.19
2.3.20
2.3.21
2.3.22
2.3.23
Universal synchronous/asynchronous receiver transmitters (USARTs)
The STM32F103xC, STM32F103xD and STM32F103xE performance line embeds three
universal synchronous/asynchronous receiver transmitters (USART1, USART2 and
USART3) and two universal asynchronous receiver transmitters (UART4 and UART5).
These five interfaces provide asynchronous communication, IrDA SIR ENDEC support,
multiprocessor communication mode, single-wire half-duplex communication mode and
have LIN Master/Slave capability.
The USART1 interface is able to communicate at speeds of up to 4.5 Mbit/s. The other
available interfaces communicate at up to 2.25 Mbit/s.
USART1, USART2 and USART3 also provide hardware management of the CTS and RTS
signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication capability. All
interfaces can be served by the DMA controller except for UART5.
Serial peripheral interface (SPI)
Up to three SPIs are able to communicate up to 18 Mbits/s in slave and master modes in
full-duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC
generation/verification supports basic SD Card/MMC modes.
All SPIs can be served by the DMA controller.
Inter-integrated sound (I
Two standard I
operated in master or slave mode. These interfaces can be configured to operate with 16/32
bit resolution, as input or output channels. Audio sampling frequencies from 8 kHz up to
48 kHz are supported. When either or both of the I
mode, the master clock can be output to the external DAC/CODEC at 256 times the
sampling frequency.
SDIO
An SD/SDIO/MMC host interface is available, that supports MultiMediaCard System
Specification Version 4.2 in three different databus modes: 1-bit (default), 4-bit and 8-bit.
The interface allows data transfer at up to 48 MHz in 8-bit mode, and is compliant with SD
Memory Card Specifications Version 2.0.
The SDIO Card Specification Version 2.0 is also supported with two different databus
modes: 1-bit (default) and 4-bit.
The current version supports only one SD/SDIO/MMC4.2 card at any one time and a stack
of MMC4.1 or previous.
In addition to SD/SDIO/MMC, this interface is also fully compliant with the CE-ATA digital
protocol Rev1.1.
Controller area network (CAN)
The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It
can receive and transmit standard frames with 11-bit identifiers as well as extended frames
with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and
14 scalable filter banks.
2
S interfaces (multiplexed with SPI2 and SPI3) are available, that can be
Doc ID 14611 Rev 8
2
S)
2
S interfaces is/are configured in master
Description
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